AT25DF641_13 datasheet(37/56 Pages) ETC2

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AT25DF641

3680F–DFLASH–4/10

10.1.6. RSTE Bit

The RSTE bit is used to enable or disable the Reset command. When the RSTE bit is in the logical “0” state (the

default state after power-up), the Reset command is disabled and any attempts to reset the device using the

Reset command will be ignored. When the RSTE bit is in the logical “1” state, the Reset command is enabled.

The RSTE bit will retain its state as long as power is applied to the device. Once set to the logical “1” state, the

RSTE bit will remain in that state until it is modified using the Write Status Register Byte 2 command or until the

device has been power cycled. The Reset command itself will not change the state of the RSTE bit.

10.1.7. SLE Bit

The SLE bit is used to enable and disable the Sector Lockdown and Freeze Sector Lockdown State commands.

When the SLE bit is in the logical “0” state (the default state after power-up), the Sector Lockdown and Freeze

Sector Lockdown commands are disabled. If the Sector Lockdown and Freeze Sector Lockdown commands are

disabled, then any attempts to issue the commands will be ignored. This provides a safeguard for these

commands against accidental or erroneous execution. When the SLE bit is in the logical “1” state, the Sector

Lockdown and Freeze Sector Lockdown State commands are enabled.

Unlike the WEL bit, the SLE bit does not automatically reset after certain device operations. Therefore, once set,

the SLE bit will remain in the logical “1” state until it is modified using the Write Status Register Byte 2 command

or until the device has been power cycled. The Reset command has no effect on the SLE bit.

If the Freeze Sector Lockdown State command has been issued, then the SLE bit will be permanently reset in the

logical “0” state to indicate that the Sector Lockdown command has been disabled.

10.1.8. PS Bit

The PS bit indicates whether or not a sector is in the Program Suspend state.

10.1.9. ES Bit

The ES bit indicates whether or not a sector is in the Erase Suspend state.

10.1.10. RDY/BSY Bit

The RDY/BSY bit is used to determine whether or not an internal operation, such as a program or erase, is in

progress. To poll the RDY/BSY bit to detect the completion of a program or erase cycle, new Status Register data

must be continually clocked out of the device until the state of the RDY/BSY bit changes from a logical “1” to a

logical “0”.

Figure 10-1.

Read Status Register

SCK

MS B

10 11

21 22

15 16

13 14

23 24

28 29

OPCODE

MS B

S TATUS R E GIS TE R

BYTE 1

S TATUS R E GIS TE R

BYTE 1

S TATUS R E GIS TE R

BYTE 2

HIG H-IMP E DANC E

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