CS4297 datasheet(16/46 Pages) CIRRUS

16 / 46 page

DS242F5

CS4297

CrystalClear™ SoundFusion™ Audio Codec ’97

Slot 0: Serial Data Output Slot Tags

The first slot, Slot 0, is a 16-bit slot which contains information about the validity of data for the remaining

12 slots. The 16 bits of this slot are defined as:

Valid Frame - Bit 15 determines if any of the following slots contain valid data. If this bit is ‘set’, at least

one of the other 12 slots contain valid data. If this bit is ‘cleared’, the remainder of the frame will be ig-

nored.

Slot 1 Valid - Bit 14 indicates the validity of data in the serial data output Slot 1. If this bit is ‘set’, Slot 1

contains valid data. If this bit is ‘cleared’, Slot 1 will be ignored.

Slot 2 Valid - Bit 13 indicates the validity of data in the serial data output Slot 2. If this bit is ‘set’, Slot 2

contains valid data. If this bit is ‘cleared’, Slot 2 will be ignored.

Slot 3 Valid - Bit 12 indicates the validity of data in the serial data output Slot 3. If this bit is ‘set’, Slot 3

contains valid data. If this bit is ‘cleared’, Slot 3 will be ignored.

Slot 4 Valid - Bit 11 indicates the validity of data in the serial data output Slot 4. If this bit is ‘set’, Slot 4

contains valid data. If this bit is ‘cleared’, Slot 4 will be ignored.

Slot 0 bits 10 through 0 represent unimplemented data slots in the CS4297 and will be ignored.

The input PCM data to the CS4297 on the SDATA_OUT pin is shifted out MSB justified (most significant

bit of the actual data of the 20-bit slots). In any case where there are less than 20-bits of valid data for a

slot (i.e.: 18-bit PCM data in a 20-bit slot), the trailing bits of the slot must be ‘cleared’ by the AC’97 Con-

troller. For Slots 5 - 12, the AC’97 Controller should ‘clear’ each bit in each frame, however data in these

slots will be ignored.

Slot 1: AC’97 Register Address

Slot 1 indicates the Register Address of the current frame’s register access. The 20 bits of this slot are de-

fined as:

Table 1. Command Address Port Bit Definition

R/W - Bit 19 is the Read/Write bit. When this bit is ‘set’, a read of the AC’97 Register specified by the

occur when the Slot Valid bit 14 of Slot 0 (F1) corresponding to Slot 1 is ‘set’.

RI6 - RI0 - Bits 18-12 contain the 7-bit register index to the AC’97 Registers in the CS4297. All registers

are defined at word addressable boundaries. Bit 12 will be saved for historic purposes but is not decoded.

Bits 11-0 are reserved and should always be ‘cleared’ the AC’97 Controller.

F10

F11

F12

F13

F14

F15

Bit 15

765

43210

Valid

Frame

Slot 1

Valid

Slot 2

Valid

Slot 3

Valid

Slot 4

Valid

Not Used

F16

F17

F18

F19

F20

F21

F22

F23

F24

F25

F26

F27

F28

F29

F30

F31

F32

F33

F34

F35

Bit 19

876

5432

R/W

RI6

RI5

RI4

RI3

RI2

RI1

RI0

Reserved

CS4297 датащи(PDF) 16 Page - Cirrus Logic

CS4297 датащи(HTML) 16 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46

датащи скачать

ссылки URL