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CS4294 датащи(PDF) 33 Page - Cirrus Logic

номер детали CS4294
подробное описание детали  SoundFusion Audio/Docking Codec 97 (AMC 97)
PDF  42 Pages
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производитель  CIRRUS [Cirrus Logic]
домашняя страница  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS4294 датащи(HTML) 33 Page - Cirrus Logic

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CS4294
DS326PP4
33
8. PIN DESCRIPTIONS
8.1
Digital I/O Pins
RESET# - AC ’97 Chip Reset, Input
This active low signal is the asynchronous Cold Reset input to the CS4294. The CS4294 must
be reset before it can enter normal operating mode. When the PR4 bit of register 26h is set, the
RESET# rising edge will be used as an AC ‘97 2.1 Warm Reset only, preserving register
values.
SYNC - AC-link Serial Port Sync pulse, Input
This signal is the serial port timing signal for the AC-link of the CS4294. Its period is the
reciprocal of the sample rate of the CS4294, 48 kHz. This signal is generated by the AC ’97
Controller and is synchronous to BIT_CLK. SYNC is also an asynchronous input when the
CS4294 is in a PR4 powerdown state and is configured as a primary codec. A series
terminating resistor of 47
Ω should be connected on this signal close to the device driving the
signal.
6
2
4
8
10
1
3
5
7
9
11
12
13 14 15 16 17 18 19 20 21 22 23 24
31
35
33
29
27
36
34
32
30
28
26
25
48 47 46 45 44 43 42 41 40 39 38 37
Vrefout
AVdd3
AVdd2
AVss2
DVss1
DVss2
DVdd1
GPIO3
XTL_OUT
XTL_IN
SDATA_OUT
BIT_CLK
SDATA_IN
DVdd2
SYNC
RESET#
ID0#
ALT_LINE_OUT_R
ALT_LINE_OUT_L
LINE_OUT_R
LINE_OUT_L
ID1#
AFLT2
AFLT1
CS4294-XQ
48-Pin TQFP



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