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RL78 датащи(PDF) 14 Page - Renesas Technology Corp

номер детали RL78
подробное описание детали  EEPROM Emulation Library Pack
PDF  18 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

RL78 датащи(HTML) 14 Page - Renesas Technology Corp

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RL78 Family
EEPROM Emulation Library Pack02 Ver.1.01
Release Note
R20UT2645EJ0100
Rev.1.00
Page 14 of 15
Mar 28, 2014
8.3
Definition of the On-Chip RAM Area
This section describes how the on-chip RAM area is defined in the link directive file.
Normally, the entire on-chip RAM area is automatically defined as "RAM" unless otherwise stated in the link directive
file. Stacks are to be allocated to "RAM" except as otherwise noted
Note. However, in this case, stacks or data buffers
are allocated to an area (self-RAM or FFE20H to FFEFFH) that is prohibited to be used by the EEPROM Emulation
Library Pack02 and the program may not operate correctly.
In the attached link directive file for the sample program, as a solution, "RAM" is re-defined not to include the area
which the EEPROM Emulation Library Pack02 is prohibited to use so that stacks or data buffers are not allocated to
that area.
In the above code, "RAM" is re-defined to be an area (FF300H to FFE1FH)
Note with a size of B20H bytes and starting
from address FF300H. This prevents the area which the EEPROM Emulation Library Pack02 is prohibited to use from
being included in "RAM".
However, if only this setting is made, the area of "FFE20H to FFEFFH" cannot be used for any other purposes either.
Therefore, the following definition must be added separately. There are no particular restrictions regarding the name of
this area.
If there is a self-RAM area, by defining its range with the name of "SELFRAM", automatic allocation of variables to this
area can be restricted.
A setting example for the RL78/G13 (product with 4-Kbyte RAM and 64-Kbyte ROM) is given below.
Note: The CA78K0R linker allocates data whose allocation destination is not specified (segment type of DSEG or
BSEG) to the on-chip RAM area according to the re-allocation attribute of the data. Accordingly, specific data
may not be allocated to the area with the name of "RAM" in some situations.
For details on the definition or allocation method of each data, refer to the user's manual of the CubeSuite+.
The map file (*.map) generated at build must be referenced to confirm the allocation state.
MEMORY RAM
:(0FF300H, 000B20H)
; ----------------------------------------------------------
; Define new memory entry for Self-RAM
; ----------------------------------------------------------
MEMORY SELFRAM
: ( 0FEF00H, 000400H )
Definition of the self-RAM area
; ----------------------------------------------------------
; Redefined default data segment RAM
; ----------------------------------------------------------
MEMORY RAM
: ( 0FF300H, 000B20H )
Definition of the RAM area to be used normally
; ----------------------------------------------------------
; Define new memory entry for saddr area
; ----------------------------------------------------------
MEMORY RAM_SADDR : ( 0FFE20H, 0001E0H )
Definition of the area from FFE20H to FFFFFH
MEMORY SADDR_RAM:(0FFE20H, 0001E0H)
MEMORY SELFRAM
:(0FEF00H, 000400H)



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