RX64M datasheet(33/67 Pages) RENESAS

33 / 67 page

RX64M Group

1. Overview

Under development Preliminary document

Specifications in this document are tentative and subject to change.

R01DS0173EJ0090 Rev.0.90

Page 33 of 67

Feb 28, 2014

Table 1.5

List of Pin and Pin Functions (177-Pin TFLGA, 176-Pin LFBGA) (1/7)

Number

Power Supply

Clock System

Control

I/O Port

Bus

EXDMAC

SDRAMC

Timer

Communication

Memory Interface

Camera Interface

Interrupt

S12ADC,

R12DA

177-Pin

TFLGA

176-Pin

LFBGA

(MTU, GPTA, TPU,

TMR, PPG, RTC,

CMTW, POE, CAC)

(ETHERC, SCIg,

SCIh, RSPI, RIIC,

CAN, USB, SSI)

(QSPI, SDHI,

MMCIF, PDC)

AVSS0

AVCC0

VREFL0

P42

IRQ10-

AN002

P46

IRQ14-

AN006

VCC

VSS

P94

A20/D20

ET1_ERXD0/

RMII1_RXD0

VCC

A10

P97

A23/D23

ET1_ERXD3

A11

PD6

D6[A6/D6]

MTIC5V/MTIOC8A/

POE4#

MMC_D0-B/

SDHI_D0-B/

QIO0-B/

QMO-B

IRQ6

AN106

A12

P60

CS0#

ET1_TX_EN/

RMII1_TXD_EN

A13

P63

CS3#/CAS#

A14

PE1

D9[A9/D9]

MTIOC4C/MTIOC3B/

GTIOC1B-A/PO18

TXD12/SMOSI12/

SSDA12/TXDX12/

SIOX12

MMC_D5-B

ANEX1

A15

PE2

D10[A10/D10]

MTIOC4A/

GTIOC0B-A/PO23/

TIC3

RXD12/SMISO12/

SSCL12/

RXDX12

MMC_D6-B

IRQ7-DS

AN100

P05

IRQ13

DA1

P07

IRQ15

ADTRG0#

P40

IRQ8-DS

AN000

P41

IRQ9-DS

AN001

P47

IRQ15-

AN007

P91

A17/D17

ET1_COL/SCK7

AN115

P92

A18/D18

POE4#

ET1_CRS/

RMII1_CRS_DV/

RXD7/SMISO7/SSCL7

AN116

PD1

D1[A1/D1]

MTIOC4B/

GTIOC1A-E/POE0#

CTX0

IRQ1

AN109

P96

A22/D22

ET1_ERXD2

B10

PD4

D4[A4/D4]

MTIOC8B/POE11#

MMC_CMD-B/

SDHI_CMD-B/

QSSL-B

IRQ4

AN112

B11

PG1

D25

ET1_RX_ER/

RMII1_RX_ER

B12

VSS

B13

P64

CS4#/WE#

B14

PE0

D8[A8/D8]

MTIOC3D/

GTIOC2B-A

SCK12

MMC_D4-B

ANEX0

B15

PE3

D11[A11/D11]

MTIOC4B/

GTIOC2A-A/PO26/

POE8#/TOC3

CTS12#/RTS12#/

SS12#/

ET0_ERXD3

MMC_D7-B

AN101

AVSS1

AVCC1

VREFH0

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