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TS68C429AMFB/C датащи(PDF) 29 Page - ATMEL Corporation |
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TS68C429AMFB/C датащи(HTML) 29 Page - ATMEL Corporation |
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29 / 43 page ![]() 29 TS68C429A 2120A–HIREL–08/02 Figure 25. Base Register • The Interrupt Vector Number During an interrupt acknowledge cycle, an 8-bit vector number is presented to the micro- processor on D0-D7 lines. This vector number corresponds to the interrupt source requesting service. The format of this number is given below. Figure 26. Self-test Description A self-test has been implemented for the receiver control label matrix RAM and the transmitter FIFO. This test can be used to guarantee the good behavior of the different MRT’s memories. |
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