64GA106 datasheet(168/330 Pages) MICROCHIP

168 / 330 page

PIC24FJ256GA110 FAMILY

DS39905E-page 168

 2010 Microchip Technology Inc.

14.2

Compare Operations

In Compare mode (Figure 14-1), the enhanced output

compare module can be configured for single-shot or

continuous pulse generation; it can also repeatedly

toggle an output pin on each timer event.

To set up the module for compare operations:

Configure the OCx output for one of the

available Peripheral Pin Select pins.

Calculate the required values for the OCxR and

(for Double Compare modes) OCxRS duty cycle

registers:

Determine the instruction clock cycle time.

Take into account the frequency of the

external clock to the timer source (if one is

used) and the timer prescaler settings.

Calculate time to the rising edge of the out-

put pulse relative to the timer start value

(0000h).

Calculate the time to the falling edge of the

pulse based on the desired pulse width and

the time to the rising edge of the pulse.

Write the rising edge value to OCxR, and the

falling edge value to OCxRS.

Set the Timer Period register, PRy, to a value

equal to or greater than the value in OCxRS.

Set the OCM<2:0> bits for the appropriate

compare operation (= 0xx).

For Trigger mode operations, set OCTRIG to

enable Trigger mode. Set or clear TRIGMODE to

configure trigger operation, and TRIGSTAT to

select a hardware or software trigger. For

Synchronous mode, clear OCTRIG.

Set the SYNCSEL<4:0> bits to configure the

trigger or synchronization source. If free-running

timer operation is required, set the SYNCSEL bits

to ‘00000’ (no sync/trigger source).

Select

the

time

base

source

with

the

OCTSEL<2:0> bits. If necessary, set the TON bit

for the selected timer which enables the compare

time base to count. Synchronous mode operation

starts as soon as the time base is enabled; Trigger

mode operation starts after a trigger source event

occurs.

FIGURE 14-1:

OUTPUT COMPARE BLOCK DIAGRAM (16-BIT MODE)

OCxR

Comparator

OCxTMR

OCxCON1

OCxCON2

OC Output and

OCx Interrupt

OCx Pin(1)

OCxRS

Comparator

Fault Logic

Match Event

Trigger and

Sync Logic

Clock

Select

Increment

Reset

OC Clock

Sources

Trigger and

Sync Sources

Reset

Match Event

OCFA/OCFB

OCTSELx

SYNCSELx

TRIGSTAT

TRIGMODE

OCTRIG

OCMx

OCINV

OCTRIS

FLTOUT

FLTTRIEN

FLTMD

ENFLT0

OCFLT0

Note 1:

The OCx outputs must be assigned to an available RPn pin before use. Please see Section 10.4 “Peripheral

Pin Select”

for more information.

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