64GA106 datasheet(215/330 Pages) MICROCHIP

215 / 330 page

 2010 Microchip Technology Inc.

DS39905E-page 215

PIC24FJ256GA110 FAMILY

ALCFGRPT: ALARM CONFIGURATION REGISTER

R/W-0

ALRMEN

CHIME

AMASK3

AMASK2

AMASK1

AMASK0

ALRMPTR1

ALRMPTR0

bit 15

bit 8

R/W-0

ARPT7

ARPT6

ARPT5

ARPT4

ARPT3

ARPT2

ARPT1

ARPT0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

ALRMEN:

Alarm Enable bit

= Alarm is enabled (cleared automatically after an alarm event whenever ARPT<7:0> = 00h and

CHIME = 0)

= Alarm is disabled

bit 14

CHIME:

Chime Enable bit

= Chime is enabled; ARPT<7:0> bits are allowed to roll over from 00h to FFh

= Chime is disabled; ARPT<7:0> bits stop once they reach 00h

bit 13-10

AMASK<3:0>:

Alarm Mask Configuration bits

0000

= Every half second

0001

= Every second

0010

= Every 10 seconds

0011

= Every minute

0100

= Every 10 minutes

0101

= Every hour

0110

= Once a day

0111

= Once a week

1000

= Once a month

1001

= Once a year (except when configured for February 29th, once every 4 years)

101x

= Reserved; do not use

11xx

= Reserved; do not use

bit 9-8

ALRMPTR<1:0>:

Alarm Value Register Window Pointer bits

Points to the corresponding Alarm Value registers when reading ALRMVALH and ALRMVALL registers;

the ALRMPTR<1:0> value decrements on every read or write of ALRMVALH until it reaches ‘00’.

ALRMVAL<15:8>:

= ALRMMIN

=ALRMWD

= ALRMMNTH

= Unimplemented

ALRMVAL<7:0>:

= ALRMSEC

=ALRMHR

=ALRMDAY

= Unimplemented

bit 7-0

ARPT<7:0>:

Alarm Repeat Counter Value bits

11111111

= Alarm will repeat 255 more times

...

00000000

= Alarm will not repeat

The counter decrements on any alarm event. The counter is prevented from rolling over from 00h to

FFh unless CHIME = 1.

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