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DSPIC33FJ64GP706 датащи(PDF) 191 Page - Microchip Technology

номер детали DSPIC33FJ64GP706
подробное описание детали  High-Performance 16-Bit Digital Signal Controllers
PDF  322 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DSPIC33FJ64GP706 датащи(HTML) 191 Page - Microchip Technology

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© 2009 Microchip Technology Inc.
DS70286C-page 189
dsPIC33FJXXXGPX06/X08/X10
bit 5
ADDEN: Address Character Detect bit (bit 8 of received data = 1)
1
= Address Detect mode enabled. If 9-bit mode is not selected, this does not take effect
0
= Address Detect mode disabled
bit 4
RIDLE: Receiver Idle bit (read-only)
1
= Receiver is Idle
0
= Receiver is active
bit 3
PERR: Parity Error Status bit (read-only)
1
= Parity error has been detected for the current character (character at the top of the receive FIFO)
0
= Parity error has not been detected
bit 2
FERR: Framing Error Status bit (read-only)
1
= Framing error has been detected for the current character (character at the top of the receive
FIFO)
0
= Framing error has not been detected
bit 1
OERR: Receive Buffer Overrun Error Status bit (read/clear only)
1
= Receive buffer has overflowed
0
= Receive buffer has not overflowed. Clearing a previously set OERR bit (1
→ 0 transition) will reset
the receiver buffer and the UxRSR to the empty state
bit 0
URXDA: Receive Buffer Data Available bit (read-only)
1
= Receive buffer has data, at least one more character can be read
0
= Receive buffer is empty
REGISTER 18-2:
UxSTA: UARTx STATUS AND CONTROL REGISTER (CONTINUED)
Note 1: Refer to Section 17. “UART” (DS70188) in the “dsPIC33F Family Reference Manual” for information on
enabling the UART module for transmit operation.



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