PSD833F2 datasheet(80/128 Pages) STMICROELECTRONICS

80 / 128 page

Power management

PSD8XXFX

80/128

Doc ID 7833 Rev 7

17.1

Automatic Power-down (APD) Unit and Power-down mode

The APD Unit, shown in Figure 31, puts the PSD into Power-down mode by monitoring the

activity of Address Strobe (ALE/AS, PD0). If the APD Unit is enabled, as soon as activity on

Address Strobe (ALE/AS, PD0) stops, a four bit counter starts counting. If Address Strobe

(ALE/AS, PD0) remains inactive for fifteen clock periods of CLKIN (PD1), Power-down

(PDN) goes high, and the PSD enters Power-down mode, as discussed next.

Power-down mode

By default, if you enable the APD Unit, Power-down mode is automatically enabled. The

device enters Power-down mode if Address Strobe (ALE/AS, PD0) remains inactive for

fifteen periods of CLKIN (PD1).

The following should be kept in mind when the PSD is in Power-down mode:

●

If Address Strobe (ALE/AS, PD0) starts pulsing again, the PSD returns to normal

operating mode. The PSD also returns to normal operating mode if either PSD Chip

Select input (CSI, PD2) is low or the Reset (RESET) input is high.

●

The MCU address/data bus is blocked from all memory and PLDs.

●

Various signals can be blocked (prior to Power-down mode) from entering the PLDs by

setting the appropriate bits in the PMMR registers. The blocked signals include MCU

control signals and the common CLKIN (PD1). Note that blocking CLKIN (PD1) from

the PLDs does not block CLKIN (PD1) from the APD Unit.

●

All PSD memories enter Standby mode and are drawing standby current. However, the

PLD and I/O ports blocks do not go into Standby mode because you don’t want to have

to wait for the logic and I/O to “wake up” before their outputs can change. See Table 29

for Power-down mode effects on PSD ports.

●

Typical standby current is of the order of microamperes. These standby current values

assume that there are no transitions on any PLD input.

Table 29.

Power-down mode’s effect on ports

Port function

Pin level

MCU I/O

No change

PLD Out

No change

Address Out

Undefined

Data port

Tri-state

Peripheral I/O

Tri-state

Obsolete

Product(s)

- Obsolete

Product(s)

PSD833F2 датащи(PDF) 80 Page - STMicroelectronics

PSD833F2 датащи(HTML) 80 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL