LTC6085CDHC datasheet(10/16 Pages) LINEAR

10 / 16 page

LTC6084/LTC6085

60845fa

APPLICATIONS INFORMATION

Rail-to-Rail Input

The input stage of LTC6084/LTC6085 combines both PMOS

and NMOS differential pairs, extending its input common

mode voltage to both positive and negative supply volt-

ages. At high input common mode range, NMOS pair is

on. At low common mode range, the PMOS pair is on. The

transition happens when the common voltage is between

1.3 and 0.9V below the positive supply.

Achieving Low Input Bias Current

The DD and DHC packages are leadless and make contact

to the PCB beneath the package. Solder ﬂux used during

the attachment of the part to the PCB can create leakage

current paths and can degrade the input bias current per-

formance of the part. All inputs are susceptible because

the backside paddle is connected to V– internally. As the

input voltage or V– changes, a leakage path can be formed

and alter the observed input bias current. For lowest bias

current use the LTC6084/LTC6085 in the leaded MSOP/GN

package. With ﬁne PCB design rules, you can also provide

a guard ring around the inputs.

For example, in high source impedance applications such as

pH probes, photo diodes, strain gauges, etc., the low input

bias current of these parts requires a clean board layout to

minimize additional leakage current into a high impedance

signal node. A mere 100GΩ of PC board resistance between

a 5V supply trace and input trace near ground potential

adds 50pA of leakage current. This leakage is far greater

than the bias current of the operational ampliﬁer. A guard

ring around the high impedance input traces driven by a

low impedance source equal to the input voltage prevents

such leakage problems. The guard ring should extend

as far as necessary to shield the high impedance signal

from any and all leakage paths. Figure 1 shows the use

of a guard ring in a unity-gain conﬁguration. In this case

the guard ring is connected to the output and is shielding

the high impedance noninverting input from V–. Figure 2

shows the inverting gain conﬁguration.

Rail-to-Rail Output

The output stage of the LTC6084/LTC6085 swings within

5mV of the supply rails when driving high impedance

loads, in other words when no DC load current is present.

See the Typical Performance Characteristics for curves of

output swing versus load current. The class AB design of

the output stage enables the op amp to supply load cur-

rents which are much greater than the quiescent supply

current. For example, the room temperature short-circuit

current is typically 12.5mA.

Capacitive Load

LTC6084/LTC6085 can drive a capacitive load up to 300pF in

unity gain. The capacitive load driving capability increases

as the ampliﬁer is used in higher gain conﬁgurations. A

small series resistance between the output and the load

further increases the amount of capacitance the ampliﬁer

can drive.

Figure 1. Sample Layout. Unity-Gain Conﬁguration. Using Guard

Ring to Shield High Impedance Input from Board Leakage

Figure 2. Sample Layout. Inverting Gain Conﬁguration. Using

Guard Ring to Shield High Impedance Input from Board Leakage

LTC6084

OUT

IN–

IN+

V–

LEAKAGE

CURRENT

NO LEAKAGE

CURRENT

GUARD

RING

NO SOLDER MASK

OVER THE GUARD RING

60845 F01

LTC6084

60845 F02

OUT

IN–

IN+

V–

VIN

GND

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