AM79C976 datasheet(172/309 Pages) AMD

172 / 309 page

172

Am79C976

8/01/00

P R E L I M INARY

Table 84. XMTPOLLTIME: Transmit Polling Interval Register

RAP Register

The RAP (Register Address Pointer) register is used to

gain access to CSR and BCR registers on board the

Am79C976 controller. The RAP contains the address

of a CSR or BCR.

As an example of RAP use, consider a read access to

CSR4. In order to access this register, it is necessary

to first load the value 0004h into the RAP by performing

a write access to the RAP offset of 12h (12h when WIO

mode has been selected, 14h when DWIO mode has

been selected). Then a second access is performed,

this time to the RDP offset of 10h (for either WIO or

DWIO mode). The RDP access is a read access, and

since RAP has just been loaded with the value of 0004h,

the RDP read will yield the contents of CSR4. A read of

the BDP at this time (offset of 16h when WIO mode has

been selected, 1Ch when DWIO mode has been select-

ed) will yield the contents of BCR4, since the RAP is

used as the pointer into both BDP and RDP space.

5$3 5HJLVWHU $GGUHVV3RUW

Bit

Name

Description

31-16

RES

Reserved locations. Written as

zeros and read as undefined.

15-8

RES

Reserved locations. Read and

written as zeros.

7-0

RAP

of these 8 bits determines which

CSR or BCR will be accessed

when an I/O access to the RDP

or BDP port, respectively, is per-

formed.

A write access to undefined CSR

or BCR locations may cause un-

expected reprogramming of the

Am79C976 control registers. A

read access will yield undefined

values.

Read/Write accessible. RAP is

cleared

H_RESET

S_RESET and is unaffected by

setting the STOP bit.

Bit

Name

Description

15-0

XMTPOLLTIME

Transmit Polling Interval. This register contains the time that the Am79C976 controller will wait

between successive polling operations. The XMTPOLLTIME value is expressed as the two’s

complement of the desired interval, where each bit of XMTPOLLTIME represents ERCLK clock

periods. XMTPOLLTIME[3:0] are ignored. (XMTPOLLTIME[16] is implied to be a one, so

XMTPOLLTIME[15] is significant and does not represent the sign of the two’s complement

XMTPOLLTIME value.)

The default value of this register is 0000h. This corresponds to a polling interval of 65,536 clock

periods (2.185 ms when ERCLK = 90 MHz).

Setting the INIT bit starts an initialization process that sets XMTPOLLTIME to its default value. If

the user wants to program a value for XMTPOLLTIME other than the default, then he must change

the value after the initialization sequence has completed.

This register is an alias for CSR47.

AM79C976 датащи(PDF) 172 Page - Advanced Micro Devices

AM79C976 датащи(HTML) 172 Page - Advanced Micro Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL