AM79C971VCW datasheet(163/265 Pages) AMD

163 / 265 page

Am79C971

163

P R E L I M INARY

Read/Write accessible always.

COLE is cleared by H_RESET

and is not affected by S_RESET

or setting the STOP bit.

BCR9: Full-Duplex Control

Note: Bits 15-0 in this register are programmable

through the EEPROM.

Bit

Name

Description

31-16 RES

Reserved locations. Written as

zeros and read as undefined.

15-3

RES

Reserved locations. Written as

zeros and read as undefined.

FDRPAD

Full-Duplex Runt Packet Accept

Disable. When FDRPAD is set to

1 and full-duplex mode is en-

abled, the Am79C971 controller

will only receive frames that meet

the

minimum

Ethernet

frame

length of 64 bytes. Receive DMA

will not start until at least 64 bytes

or a complete frame have been

received. By default, FDRPAD is

cleared to 0. The Am79C971 con-

troller will accept any length

frame and receive DMA will start

according to the programming of

the

receive

FIFO

watermark.

Note that there should not be any

runt packets in a full-duplex net-

work, since the main cause for

runt packets is a network collision

and there are no collisions in a

full-duplex network.

Read/Write accessible always.

FDRPAD is cleared by H_RESET

and is not affected by S_RESET

or by setting the STOP bit.

AUIFD

AUI Full-Duplex. AUIFD controls

whether or not full-duplex opera-

tion on the AUI port is enabled.

AUIFD

only

meaningful

FDEN (BCR9, bit 0) is set to 1. If

the FDEN bit is 0, the AUI port will

always operate in half-duplex

mode. In addition, if FDEN is set

to 1 but the AUIFD bit is reset to

0, the AUI port will always oper-

ate in half-duplex mode. If FDEN

is set to 1 and AUIFD is set to 1,

full-duplex operation on the AUI

port is enabled.

Read/Write accessible always.

AUIFD is reset to 0 by H_RESET,

and is unaffected by S_RESET

and the STOP bit.

FDEN

Full-Duplex Enable. FDEN con-

trols whether full-duplex opera-

tion is enabled. When FDEN is

cleared, full-duplex operation is

not enabled and the Am79C971

controller will always operate in

the

half-duplex

mode.

When

FDEN is set, the Am79C971 con-

troller will operate in full-duplex

mode when the 10BASE-T or MII

port is enabled or when the AUI

port is enabled and the AUIFD

(BCR9, bit 1) bit is set. When

DLNKTST (CSR15, bit 12) is set

to 1, full-duplex operation will not

be enabled on the 10BASE-T

port. FDEN will override the Auto-

Negotiation portion of the internal

10BASE-T MAU. The internal

TMAU will no longer try to auto-

matically negotiate for the link. It

assumes that the software is pro-

gramming the FDEN bit for a rea-

son and defers control. See Table

32. Do not set this bit when Auto-

Negotiation is enabled.

Read/Write accessible always.

FDEN is reset to 0 by H_RESET,

and is unaffected by S_RESET

and the STOP bit.

BCR16: I/O Base Address Lower

Bit

Name

Description

31-16 RES

Reserved locations. Written as

zeros and read as undefined.

15-5

IOBASEL

Reserved

locations.

After

H_RESET, the value of these bits

will be undefined. The settings of

these bits will have no effect on

any Am79C971 controller func-

tion. It is only included for soft-

ware

compatibility

with

other

PCnet family devices.

Read/Write accessible always.

IOBASEL is not affected by

S_RESET or STOP.

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