AM79C971VCW datasheet(160/265 Pages) AMD

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Am79C971

P R E L I M INARY

Read/Write accessible always.

RXPOLE is set to 1 by H_RESET

and is not affected by S_RESET

or setting the STOP bit.

RCVE

Receive Status Enable. When

this bit is set, a value of 1 is

passed to the LEDOUT bit in this

tivity on the network.

Read/Write accessible always.

RCVE is set to 1 by H_RESET

and is not affected by S_RESET

or setting the STOP bit.

JABE

Jabber Status Enable. When this

bit is set, a value of 1 is passed to

the LEDOUT bit in this register

when the Am79C971 controller is

jabbering on the network.

Read/Write accessible always.

JABE is cleared by H_RESET

and is not affected by S_RESET

or setting the STOP bit.

COLE

Collision Status Enable. When

this bit is set, a value of 1 is

passed to the LEDOUT bit in this

activity on the network. The activ-

ity on the collision inputs to the

AUI port within the first 4

µs after

every transmission for the pur-

pose of SQE testing will not

cause the LEDOUT bit to be set.

Read/Write accessible always.

COLE is cleared by H_RESET

and is not affected by S_RESET

or setting the STOP bit.

BCR7: LED3 Status

BCR7 controls the function(s) that the LED3 pin dis-

plays. Multiple functions can be simultaneously en-

abled on this LED pin. The LED display will indicate the

logical OR of the enabled functions. BCR7 defaults to

Transmit Status (XMT) with pulse stretcher enabled

(PSE = 1) and is fully programmable.

Note: When LEDPE (BCR2, bit 12) is set to 1, pro-

gramming of the LED3 Status register is enabled.

When LEDPE is cleared to 0, programming of the

LED3 register is disabled. Writes to those registers will

be ignored.

Note: Bits 15-0 in this register are programmable

through the EEPROM.

Bit

Name

Description

31-16 RES

Reserved locations. Written as

zeros and read as undefined.

LEDOUT

This bit indicates the current

(non-stretched) value of the LED

output pin. A value of 1 in this bit

indicates that the OR of the en-

abled signals is true.

The logical value of the LEDOUT

status signal is determined by the

settings of the individual Status

Enable bits of the LED register

(bits 8 and 6-0).

Read accessible always. This bit

is read only; writes have no ef-

fect. LEDOUT is unaffected by

H_RESET, S_RESET, or STOP.

LEDPOL

LED Polarity. When this bit has

the value 0, then the LED pin will

be driven to a LOW level whenev-

er the OR of the enabled signals

is true, and the LED pin will be

disabled and allowed to float high

whenever the OR of the enabled

signals is false (i.e., the LED out-

put will be an Open Drain output

and the output value will be the

inverse of the LEDOUT status

bit.).

When this bit has the value 1,

then the LED pin will be driven to

a HIGH level whenever the OR of

the enabled signals is true, and

the LED pin will be driven to a

LOW level whenever the OR of

the enabled signals is false (i.e.,

the LED output will be a Totem

Pole output and the output value

will be the same polarity as the

LEDOUT status bit).

The setting of this bit will not ef-

fect the polarity of the LEDOUT

bit for this register.

Read/Write accessible always.

LEDPOL is cleared by H_RESET

and is not affected by S_RESET

or setting the STOP bit.

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