Am28F020

13

FLASHERASE ELECTRICAL ERASE ALGORITHM

This Flash memory device erases the entire array in

and number of erase/program cycles on the device. In

general, reprogramming time increases as the number

of erase/program cycles increases.

The Flasherase electrical erase algorithm employs an

interactive closed loop flow to simultaneously erase all

bits in the array. Erasure begins with a read of the mem-

ory contents. The device is erased when shipped from

the factory. Reading FFh data from the device would

immediately be followed by executing the Flashrite pro-

gramming algorithm with the appropriate data pattern.

Should the device be currently programmed, data other

than FFh will be returned from address locations.

Follow the Flasherase algorithm. Uniform and reliable

erasure is ensured by first programming all bits in the

device to their charged state (Data = 00h). This is

accomplished using the Flashrite Pro grammin g

algorithm. Erasure then continues with an initial erase

operation. Erase verification (Data = FFh) begins at

address 0000h and continues through the array to the

l a s t ad dres s , or unt i l da t a ot he r t h a n FF h i s

encountered. If a byte fails to verify, the device is

eras e d agai n. W i th eac h e ra s e operati o n , a n

increasing number of bytes verify to the erased state.

Typically, devices are erased in less than 100 pulses

(one second). Erase efficiency may be improved by

storing the address of the last byte that fails to verify in

a re gist er. Followin g t he nex t era se op era tion ,

verification may start at the stored address location. A

total of 1000 erase pulses are allowed per reprogram

cycle, which corresponds to approximately 10 seconds

of cumulative erase time. The entire sequence of erase

and byte verification is performed with high voltage

erase algorithm.

Table 4.

Flasherase Electrical Erase Algorithm

Notes:

2. Erase Verify is performed only after chip erasure. A final read compare may be performed (optional) after the register is written

with the read command.

3. The erase algorithm Must Be Followed to ensure proper and reliable operation of the device.

Bus Operations

Command

Comments

Entire memory must = 00h before erasure (Note 3)

Note: Use Flashrite programming algorithm (Figure 4) for

programming.

Standby

Initialize:

Addresses

PLSCNT (Pulse count)

Write

Erase Setup

Data = 20h

Erase

Data = 20h

Standby

Write

Erase-Verify (Note 2)

Address = Byte to Verify

Data = A0h

Stops Erase Operation

Standby

Write Recovery Time before Read = 6 µs

Read

Read byte to verify erasure

Standby

Compare output to FFh

Increment pulse count

Write

Reset

Data = FFh, reset the register for read operations

Standby