AD9220ARSZ datasheet(20/32 Pages) AD

20 / 32 page

REV. E

–20–

AD9221/AD9223/AD9220

The AD9221/AD9223/AD9220 contains an internal reference

buffer, A2 (see Figure 9), that simplifies the drive requirements

of an external reference. The external reference must be able to

drive a

≈5 kΩ (±20%) load. Note that the bandwidth of the

reference buffer is deliberately left small to minimize the refer-

ence noise contribution. As a result, it is not possible to change

the reference voltage rapidly in this mode without the removal

of the CAPT/CAPB Decoupling Network.

Variable Input Span with VCM = 2.5 V

Figure 24 shows an example of the AD9221/AD9223/AD9220

configured for an input span of 2

× VREF centered at 2.5 V. An

external 2.5 V reference drives the VINB pin, thus setting the

common-mode voltage at 2.5 V. The input span can be inde-

pendently set by a voltage divider consisting of R1 and R2,

which generates the VREF signal. A1 buffers this resistor net-

work and drives VREF. Choose this op amp based on accuracy

requirements. It is essential that a minimum of a 10

µF capaci-

tor in parallel with a 0.1

µF low inductance ceramic capacitor

decouple the reference output to ground.

2.5V+VREF

2.5V–VREF

2.5V

+5V

0.1 F

22 F

VINA

VINB

VREF

SENSE

+5V

0.1 F

2.5V

REF

AD9221/

AD9223/

AD9220

Figure 24. External Reference—VCM = 2.5 V (2.5 V

on VINB, Resistor Divider to Make VREF)

Single-Ended Input with 0 to 2

VREF Range

Figure 25 shows an example of an external reference driving

both VINB and VREF. In this case, both the common-mode

voltage and input span are directly dependent on the value of

VREF. More specifically, the common-mode voltage is equal to

VREF while the input span is equal to 2

× VREF. Thus, the

valid input range extends from 0 to 2

× VREF. For example, if

the REF-191, a 2.048 external reference was selected, the valid

input range extends from 0 to 4.096 V. In this case, 1 LSB of

the AD9221/AD9223/AD9220 corresponds to 1 mV. It is essen-

tial that a minimum of a 10

µF capacitor in parallel with a 0.1 µF

low inductance ceramic capacitor decouple the reference output

to ground.

2 REF

+5V

10 F

VINA

VINB

VREF

SENSE

AD9221/

AD9223/

AD9220

+5V

0.1 F

VREF

0.1 F

Figure 25. Input Range = 0 V to 2

× VREF

Low Cost/Power Reference

The external reference circuit shown in Figure 26 uses a low

cost 1.225 V external reference (e.g., AD580 or AD1580) along

with an op amp and transistor. The 2N2222 transistor acts in

conjunction with 1/2 of an OP282 to provide a very low imped-

ance drive for VINB. The selected op amp need not be a high

speed op amp and may be selected based on cost, power, and

accuracy.

3.75V

1.25V

10 F

VINA

VINB

VREF

SENSE

AD9221/

AD9223/

AD9220

0.1 F

316

0.1 F

1/2

OP282

10 F

0.1 F

7.5k

AD1580

820

2N2222

1.225V

Figure 26. External Reference Using the AD1580

and Low Impedance Buffer

DIGITAL INPUTS AND OUTPUTS

Digital Outputs

The AD9221/AD9223/AD9220 output data is presented in

positive true straight binary for all input ranges. Table IV indi-

cates the output data formats for various input ranges regardless

of the selected input range. A twos complement output data

format can be created by inverting the MSB.

Table IV. Output Data Format

Input (V)

Condition (V)

Digital Output

OTR

VINA –VINB

< – VREF

0000 0000 0000

VINA –VINB

= – VREF

0000 0000 0000

VINA –VINB

= 0

1000 0000 0000

VINA –VINB

= + VREF – 1 LSB

1111 1111 1111

VINA –VINB

≥ + VREF

1111 1111 1111

1111 1111 1110

OTR

–FS

+FS

–FS+1/2 LSB

+FS –1/2 LSB

–FS –1/2 LSB

+FS –1 1/2 LSB

0000 0000 0001

0000 0000 0000

OTR DATA OUTPUTS

Figure 27. Output Data Format

Out Of Range (OTR)

An out-of-range condition exists when the analog input voltage

is beyond the input range of the converter. OTR is a digital

output that is updated along with the data output corresponding

to the particular sampled analog input voltage. Thus, OTR has

the same pipeline delay (latency) as the digital data. It is LOW

when the analog input voltage is within the analog input range.

It is HIGH when the analog input voltage exceeds the input

range as shown in Figure 27. OTR will remain HIGH until the

analog input returns within the input range and another conver-

sion is completed. By logical ANDing OTR with the MSB and

its complement, overrange high or underrange low conditions

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