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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AD7713 датащи(PDF) 25 Page - Analog Devices |
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AD7713 датащи(HTML) 25 Page - Analog Devices |
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25 / 28 page  REV. D AD7713 –25– OTHER 24-BIT SIGNAL CONDITIONING ADCS AVAILABLE FROM ANALOG DEVICES AD7710 FEATURES Charge Balancing 24 Bits No Missing Codes 0.0015% Nonlinearity 2-Channel Programmable Gain Front End Gains from 1 to 128 Differential Inputs Low-Pass Filter with Programmable Filter Cutoffs Ability to Read/Write Calibration Coefficients Bidirectional Microcontroller Serial Interface Internal/External Reference Option Single- or Dual-Supply Operation Low Power (25 mW typ) with Power-Down Mode (7 mW typ) APPLICATIONS Weigh Scales Thermocouples Smart Transmitters Chromatography AD7711 FEATURES Charge Balancing ADC 24 Bits No Missing Codes 0.0015% Nonlinearity 2-Channel Programmable Gain Front End Gains from 1 to 128 1 Differential Input 1 Single-Ended Input Low-Pass Filter with Programmable Filter Cutoff Ability to Read/Write Calibration Coefficients RTD Excitation Current Sources Bidirectional Microcontroller Serial Interface Internal/External Reference Option Single- or Dual-Supply Operation Low Power (25 mW typ) with Power-Down Mode (7 mW typ) APPLICATIONS RTD Transducers Process Control Smart Transmitters Portable Industrial Instruments FUNCTIONAL BLOCK DIAGRAM CHARGING BALANCING A/D CONVERTER AUTO-ZEROED – MODULATOR DIGITAL FILTER CLOCK GENERATION AD7710 AGND DGND MCLK OUT MCLK IN AIN1(+) AIN1(–) AIN2(+) AIN2(–) REF IN(+) AVDD DVDD AVDD 4.5 A A = 1 – 128 VSS AVDD 20 A VBIAS REF OUT REF IN(–) SYNC RTD CURRENT 2.5V REFERENCE PGA SERIAL INTERFACE CONTROL REGISTER OUTPUT REGISTER MODE SDATA A0 DRDY TFS RFS SCLK FUNCTIONAL BLOCK DIAGRAM CHARGING BALANCING A/D CONVERTER AUTO-ZEROED – MODULATOR DIGITAL FILTER CLOCK GENERATION AD7711 AGND DGND MCLK OUT MCLK IN AIN1(+) AIN1(–) AIN2 REF IN(+) AVDD DVDD AVDD 4.5 A A = 1 – 128 VSS VBIAS REF OUT REF IN(–) SYNC RTD2 RTD1 2.5V REFERENCE PGA AVDD 200 A 200 A SERIAL INTERFACE CONTROL REGISTER OUTPUT REGISTER MODE SDATA A0 DRDY TFS RFS SCLK |
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