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MP1583DN датащи(PDF) 5 Page - Monolithic Power Systems |
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MP1583DN датащи(HTML) 5 Page - Monolithic Power Systems |
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5 / 13 page ![]() MP1583 – 3A, 23V, 385KHz STEP-DOWN CONVERTER MP1583 Rev. 3.1 www.MonolithicPower.com 5 6/20/2011 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. PIN FUNCTIONS (continued) Pin # Name Description 7 EN Enable/UVLO. A voltage greater than 2.71V enables operation. For complete low current shutdown the EN pin voltage needs to be at less than 900mV. When the voltage on EN exceeds 1.2V, the internal regulator will be enabled and the soft-start capacitor will begin to charge. The MP1583 will start switching after the EN pin voltage reaches 2.71V. There is 7V zener connected between EN and GND. If EN is driven by external signal, the voltage should never exceed 7V. 8 SS Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor from SS to GND to set the soft-start period. To disable the soft-start feature, leave SS unconnected. OPERATION The MP1583 is a current-mode step-down regulator. It regulates input voltages from 4.75V to 23V down to an output voltage as low as 1.222V, and is able to supply up to 3A of load current. The MP1583 uses current-mode control to regulate the output voltage. The output voltage is measured at FB through a resistive voltage divider and amplified through the internal error amplifier. The output current of the transconductance error amplifier is presented at COMP where a RC network compensates the regulation control system. The voltage at COMP is compared to the internally measured switch current to control the output voltage. The converter uses an internal N-Channel MOSFET switch to step-down the input voltage to the regulated output voltage. Since the MOSFET requires a gate voltage greater than the input voltage, a boost capacitor connected between SW and BS drives the gate. The capacitor is internally charged when SW is low. An internal 10Ω switch from SW to GND is used to insure that SW is pulled to GND when SW is low in order to fully charge the BS capacitor. LOCKOUT COMPARATOR ERROR AMPLIFIER FREQUENCY FOLDBACK COMPARATOR GM = 800 μ A/V INTERNAL REGULATORS 1 μ A 7V 1.8V SLOPE COMP CLK CURRENT COMPARATOR CURRENT SENSE AMPLIFIER SHUTDOWN COMPARATOR SS 8 COMP 6 IN 2 EN 7 GND 4 OSCILLATOR 40/385KHz S R Q SW 3 BS 1 5V + Σ Q 1.2V + + 2.54V + 1.222V 0.7V + + FB 5 -- -- -- -- -- -- Figure 1—Functional Block Diagram |
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