AD9224ARSZ datasheet(10/24 Pages) AD

10 / 24 page

AD9224

–10–

REV. A

REFERENCE OPERATION

The AD9224 contains an onboard bandgap reference that

provides a pin strappable option to generate either a 1 V or 2 V

output. With the addition of two external resistors, the user can

generate reference voltages other than 1 V and 2 V. Another

alternative is to use an external reference for designs requiring

enhanced accuracy and/or drift performance. See Table II for a

summary of the pin-strapping options for the AD9224 refer-

ence configurations.

Figure 16 shows a simplified model of the internal voltage

reference of the AD9224. A pin strappable reference ampli-

fier buffers a 1 V fixed reference. The output from the refer-

ence amplifier, A1, appears on the VREF pin. The voltage on

the VREF pin determines the full-scale input span of the A/D.

This input span equals,

Full-Scale Input Span = 2

× VREF

The voltage appearing at the VREF pin as well as the state of

the internal reference amplifier, A1, are determined by the

voltage appearing at the SENSE pin. The logic circuitry con-

tains two comparators which monitor the voltage at the SENSE

pin. The comparator with the lowest set point (approximately

0.3 V) controls the position of the switch within the feedback

path of A1. If the SENSE pin is tied to AVSS (AGND), the

switch is connected to the internal resistor network thus provid-

ing a VREF of 2.0 V. If the SENSE pin is tied to the VREF pin

via a short or resistor, the switch will connect to the SENSE

pin. This short will provide a VREF of 1.0 V. An external resis-

tor network will provide an alternative VREF between 1.0 V

and 2.0 V. The other comparator controls internal circuitry

that will disable the reference amplifier if the SENSE pin is tied

AVDD. Disabling the reference amplifier allows the VREF pin

to be driven by an external voltage reference.

LOGIC

DISABLE

6.25k

LOGIC

6.25k

DISABLE

A/D

AD9224

CAPT

CAPB

VREF

SENSE

REFCOM

Figure 16. Equivalent Reference Circuit

The actual reference voltages used by the internal circuitry of

the AD9224 appear on the CAPT and CAPB pins. For proper

operation when using the internal or an external reference, it is

necessary to add a capacitor network to decouple these pins.

Figure 17 shows the recommended decoupling network. This

capacitive network performs the following three functions: (1)

along with the reference amplifier, A2, it provides a low source

impedance over a large frequency range to drive the A/D inter-

nal circuitry, (2) it provides the necessary compensation for A2,

and (3) it bandlimits the noise contribution from the reference.

The turn-on time of the reference voltage appearing between

CAPT and CAPB is approximately 15 ms and should be evalu-

ated in any power-down mode of operation.

0.1 F

10 F

0.1 F

CAPT

CAPB

AD9224

Figure 17. Recommended CAPT/CAPB Decoupling Network

The A/D’s input span may be varied dynamically by changing

the differential reference voltage appearing across CAPT and

CAPB symmetrically around 2.5 V (i.e., midsupply). To change

the reference at speeds beyond the capabilities of A2, it will be

necessary to drive CAPT and CAPB with two high speed, low

noise amplifiers. In this case, both internal amplifiers (i.e., A1

and A2) must be disabled by connecting SENSE to AVDD,

connecting VREF to AVSS and removing the capacitive decou-

pling network. The external voltages applied to CAPT and

CAPB must be 2.0 V + Input Span/4 and 2.0 V – Input Span/4

respectively in which the input span can be varied between 2 V

and 4 V. Note that those samples within the pipeline A/D dur-

ing any reference transition will be corrupted and should be

discarded.

AD9224ARSZ датащи(PDF) 10 Page - Analog Devices

AD9224ARSZ датащи(HTML) 10 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

датащи скачать

ссылки URL