APL5331 datasheet(15/23 Pages) ANPEC

15 / 23 page

Rev. B.4 - Mar., 2008

APL5331

www.anpec.com.tw

regulation and load transient response. The negative pins

of the input and output capacitors and the GND pin of

the APL5331 should connect to analog ground plane

of the load.

See figure 1. The SOP-8P utilizes a bottom thermal

pad to minimize the thermal resistance of the package,

making the package suitable for high current

applications. The thermal pad is soldered to the top

ground pad and is connected to the internal or bottom

ground plane by several vias. The printed circuit board

(PCB) forms a heat sink and dissipates most of the

heat into the ambient air. The vias are recommended

to have proper size to retain solder, helping heat

conduction.

Thermal resistance consists of two main elements,

θJC (junction-to-case thermal resistance) and θCA (case-

to-ambient thermal resistance).

θJC is specified from

the IC junction to the bottom of the thermal pad

directly below the die.

θCA is the resistance from the

bottom of thermal pad to the ambient air and it includes

θCS (case-to-sink thermal resistance) and θSA (sink-to-

ambient thermal resistance). The specified path for

heat flow is the lowest resistance path and it dissipates

majority of the heat to the ambient air. Typically,

θCA is

the dominant thermal resistance. Therefore, enlarging

the internal or bottom ground plane reduces the

resistance

θCA . The relationship between power

dissipation and temperatures is the following equation:

PD = (TJ - TA) /

≤ θJA

where,

PD : Power dissipation

TJ : Junction Temperature

TA : Ambient Temperature

θJA: Junction-to-Ambient Thermal Resistance

Figure 2 shows a board layout using the SOP-8P

package. The demo board is made of FR-4 material

Figure 1 Package Top and side view

Layout and Thermal Consideration (Cont.)

PD (max) = (150 - 25) / 37

= 3.38W

and is a two-layer PCB. The size and thickness are

65mm* 65mm and 1.6mm. An area of 140mil*105mil

on the top layer is use as a thermal pad for the APL5331

and this is connected to the bottom layer by vias. The

bottom layer using 2 oz. copper acts as the ground

plane for the system. The PCB and all components on

the board form a heat sink. The

JA of the APL5331

(SOP-8P) mounted on this demo board is about 37oC/W

in free air. Assuming the TA=25oC and the maximum

J= 150

oC (typical thermal limit temperature), the maxi-

mum power dissipation is calculated as :

Application Information (Cont.)

If the TJ is designed to be below 125oC, the calculated

power dissipation should be less than :

PD = (125 - 25) / 37

= 2.70W

Thermal

pad

Die

Top

ground

pad

Printed

circuit

board

Internal

ground

plane

Vias

Ambient

Air

118 mil

102 mil

SOP-8P

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