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LTC1702A датащи(PDF) 15 Page - Linear Technology

номер детали LTC1702A
подробное описание детали  High Voltage, Current Mode Switching Regulator Controller with Programmable Operating Frequency
PDF  24 Pages
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производитель  LINER [Linear Technology]
домашняя страница  http://www.linear.com
Logo LINER - Linear Technology

LTC1702A датащи(HTML) 15 Page - Linear Technology

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LT3844
15
3844fb
APPLICATIONS INFORMATION
VSUPPLY(ON) is the input voltage at which the undervoltage
lockout is disabled and the supply turns on.
Example: Select RB = 49.9kΩ, VSUPPLY(ON) = 14.5V (based
on a 15V minimum input voltage)
Rk
V
V
A =
⎛
⎝⎜
⎞
⎠⎟
49 9
14 5
135
1
.•
.
.
–
= 486.1k (499k resistor is selected)
If low supply current in standby mode is required, select
a higher value of RB.
The supply turn off voltage is 9% below turn on. In the
example the VSUPPLY(OFF) would be 13.2V.
If additional hysteresis is desired for the enable function,
an external positive feedback resistor can be used from
the LT3844 regulator output.
The shutdown function can be disabled by connecting the
SHDN pin to the VIN through a large value pull-up resistor.
This pin contains a low impedance clamp at 6V, so the SHDN
pin will sink current from the pull-up resistor(RPU):
ISHDN =
VV
R
IN
PU
–6
Because this arrangement will clamp the SHDN pin to the
6V, it will violate the 5V absolute maximum voltage rating of
the pin. This is permitted, however, as long as the absolute
maximum input current rating of 1mA is not exceeded.
Input SHDN pin currents of <100μA are recommended:
a 1M or greater pull-up resistor is typically used for this
configuration.
Soft-Start
The desired soft-start time (tSS) is programmed via the
CSS capacitor as follows:
C
At
V
SS
SS
=
2
1 231
μ •
.
The amount of time in which the power supply can withstand
a VIN, VCC or VSHDN UVLO fault condition (tFAULT) before
the CSS pin voltage enters its active region is approximated
by the following formula:
t
CV
A
FAULT
SS
=
•.
065
50
μ
Oscillator SYNC
The oscillator can be synchronized to an external clock.
Set the RSET resistor at least 10% below the desired sync
frequency.
It is recommended that the SYNC pin be driven with a
square wave that has amplitude greater than 2V, pulse
width greater than 1ms and rise time less than 500ns. The
rising edge of the sync wave form triggers the discharge
of the internal oscillator capacitor.
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. Express
percent efficiency as:
% Efficiency = 100% - (L1 + L2 + L3 + ...)
where L1, L2, etc. are individual loss terms as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main contributors usually account for most
of the losses in LT3844 circuits:
1. LT3844 VIN and VCC current loss
2. I2R conduction losses
3. MOSFET transition loss
4. Schottky diode conduction loss
1. The VIN and VCC currents are the sum of the quiescent
currents of the LT3844 and the MOSFET drive currents.
The quiescent currents are in the LT3844 Electrical Char-
acteristics table. The MOSFET drive current is a result
of charging the gate capacitance of the power MOSFET
each cycle with a packet of charge, QG. QG is found in
the MOSFET data sheet. The average charging current is
calculated as QG • fSW. The power loss term due to these
currents can be reduced by backdriving VCC with a lower
voltage than VIN such as VOUT.



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