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PCF8576DT/S400/2 датащи(PDF) 37 Page - NXP Semiconductors |
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PCF8576DT/S400/2 датащи(HTML) 37 Page - NXP Semiconductors |
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37 / 57 page ![]() PCF8576D All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 14 — 10 June 2013 37 of 57 NXP Semiconductors PCF8576D Universal LCD driver for low multiplex rates The contact resistance between the SYNC on each cascaded device must be controlled. If the resistance is too high, the device is not able to synchronize properly; this is particularly applicable to chip-on-glass applications. The maximum SYNC contact resistance allowed for the number of devices in cascade is given in Table 22. The PCF8576D can be cascaded with the PCF8562. This allows optimal drive selection for a given number of pixels to display. Figure 21 and Figure 22 show the timing of the synchronization signals. Table 22. SYNC contact resistance Number of devices Maximum contact resistance 26 k 3 to 5 2.2 k 6 to 10 1.2 k 10 to 16 700 Fig 23. Cascaded PCF8576D configuration HOST MICRO- PROCESSOR/ MICRO- CONTROLLER SDA SCL CLK OSC SYNC 1, 58, 59 2, 3 4 5 7 89 6 8 9 10 11 12 13 10 11 12 40 segment drives 4 backplanes 40 segment drives LCD PANEL (up to 2560 elements) PCF8576DU A0 A1 A2 SA0 VDD VLCD DD V LCD V mdb077 SDA SCL SYNC CLK OSC 1, 58, 59 613 2, 3 4 5 7 BP0 to BP3 (open-circuit) A0 A1 A2 SA0 VSS VSS VSS VDD VLCD PCF8576DU BP0 to BP3 R tr 2CB ≤ |
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