LMP7701, LMP7702, LMP7704

SNOSAI9H – SEPTEMBER 2005 – REVISED MARCH 2013

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APPLICATION INFORMATION

LMP7701/LMP7702/LMP7704

The LMP7701/LMP7702/LMP7704 are single, dual, and quad low offset voltage, rail-to-rail input and output

precision amplifiers each with a CMOS input stage and wide supply voltage range of 2.7V to 12V. The

LMP7701/LMP7702/LMP7704 have a very low input bias current of only ±200 fA at room temperature.

The wide supply voltage range of 2.7V to 12V over the extensive temperature range of

−40°C to 125°C makes

the LMP7701/LMP7702/LMP7704 excellent choices for low voltage precision applications with extensive

temperature requirements.

The LMP7701/LMP7702/LMP7704 have only ±37

μV of typical input referred offset voltage and this offset is

specified to be less than ±500

μV for the single and ±520 μV for the dual and quad, over temperature. This

minimal offset voltage allows more accurate signal detection and amplification in precision applications.

The low input bias current of only ±200 fA along with the low input referred voltage noise of 9 nV/

√Hz gives the

LMP7701/LMP7702/LMP7704 superiority for use in sensor applications. Lower levels of noise from the

LMP7701/LMP7702/LMP7704 mean of better signal fidelity and a higher signal-to-noise ratio.

Texas Instruments is heavily committed to precision amplifiers and the market segment they serve. Technical

support and extensive characterization data is available for sensitive applications or applications with a

constrained error budget.

The LMP7701 is offered in the space saving 5-Pin SOT-23 and 8-Pin SOIC package. The LMP7702 comes in

the 8-Pin SOIC and 8-Pin VSSOP package. The LMP7704 is offered in the 14-Pin SOIC and 14-Pin TSSOP

package. These small packages are ideal solutions for area constrained PC boards and portable electronics.

CAPACITIVE LOAD

The LMP7701/LMP7702/LMP7704 can each be connected as a non-inverting unity gain follower. This

configuration is the most sensitive to capacitive loading.

The combination of a capacitive load placed on the output of an amplifier along with the amplifier's output

impedance creates a phase lag which in turn reduces the phase margin of the amplifier. If the phase margin is

significantly reduced, the response will be either underdamped or it will oscillate.

Figure 45. Isolating Capacitive Load

INPUT CAPACITANCE

CMOS input stages inherently have low input bias current and higher input referred voltage noise. The

LMP7701/LMP7702/LMP7704 enhance this performance by having the low input bias current of only ±200 fA, as

well as, a very low input referred voltage noise of 9 nV/

√Hz. In order to achieve this a larger input stage has been

used. This larger input stage increases the input capacitance of the LMP7701/LMP7702/ LMP7704. The typical

interact with other impedances such as gain and feedback resistors, which are seen on the inputs of the

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