DOC7707 datasheet(43/307 Pages) ETC1

43 / 307 page

7707F–AVR–11/10

AT90USB82/162

Mode is equivalent to Standy Mode, but is also conserved for compatibility purpose. From

Extended Standby mode, the device wakes up in six clock cycle.

Notes:

1. Only recommended with external crystal or resonator selected as clock source.

Notes:

1. For INT7:4, only level interrupt.

Notes:

1. Asynchronous USB interrupt is WAKEUPI only.

8.6

Power Reduction Register

The Power Reduction Register, PRR, provides a method to stop the clock to individual peripher-

als to reduce power consumption. The current state of the peripheral is frozen and the I/O

registers can not be read or written. Resources used by the peripheral when stopping the clock

will remain occupied, hence the peripheral should in most cases be disabled before stopping the

clock. Waking up a module, which is done by clearing the bit in PRR, puts the module in the

same state as before shutdown.

Module shutdown can be used in Idle mode and Active mode to significantly reduce the overall

power consumption.

8.6.1

Power Reduction Register 0 - PRR0

• Bit 7-6 - Reserved bits

These bits are reserved and will always read as zero.

• Bit 5 - PRTIM0: Power Reduction Timer/Counter0

Writing a logic one to this bit shuts down the Timer/Counter0 module. When the Timer/Counter0

is enabled, operation will continue like before the shutdown.

Table 8-2.

Active Clock Domains and Wake-up Sources in the Different Sleep Modes.

Active Clock

Domains

Oscillators

Wake-up Sources

Sleep Mode

Idle

XXXX

Power-down

X(1)

Power-save

X(1)

Standby(1)

XX(1)

Extended

Standby

XX(1)

Bit

7654

PRTIM0

–

PRTIM1

PRSPI

PRR0

Read/Write

R/W

Initial Value

0000

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