AD9884ASLASHPCB datasheet(23/24 Pages) AD

23 / 24 page

REV. C

AD9884A

–23–

In some cases, using separate ground planes is unavoidable. For

those cases, we recommend to at least place a single ground

plane under the AD9884A. The location of the split should be

at the receiver of the digital outputs. For this case it is even

more important to place components wisely because the current

loops will be much longer, (current takes the path of least resis-

tance). An example of a current loop:

POWER PLANE

AD9884A

DIG

ITA

D P

LAN

DIG

ITAL

GROU

ND PLANE

DIGITAL DAT

A RE

CEIV

Figure 27. Current Loop

PLL

Place the PLL loop filter components as close to the AD9884A

pins as possible.

Do not place any digital or other high frequency traces near

these components.

Use the values suggested in the data sheet with 5% tolerance

or less.

Outputs (Both Data and Clocks)

Try to minimize the trace length that the digital outputs have to

drive. Longer traces have higher capacitance, which requires

more current, which causes more internal digital noise.

Shorter traces reduce the possibility of reflections.

Adding a series resistor of value 50

Ω–200 Ω can suppress

reflections, reduce EMI, and reduce the current spikes inside of

the AD9884A. If series resistors are used, place them as close to

the AD9884A pins as possible, (although try not to add vias or

extra length to the output trace in order to get the resistors closer).

If possible, limit the capacitance that each of the digital outputs

drives to less than 10 pF. This can easily be accomplished by

keeping traces short and by connecting the outputs to only one

device. Loading the outputs with excessive capacitance will

increase the current transients inside of the AD9884A, and

create more digital noise on its power supplies.

Digital Inputs

The digital inputs on the AD9884A were designed to work with

3.3 V signals. Connecting 5 V digital signals to the part may

cause damage. To accommodate 5 V digital signals, we recom-

mend adding a series resistor at the AD9884A pin of 1 k

Ω. The

only exception is the two serial interface pins, SDA and SCL.

On these two pins, a resistor value of 150

Ω should be used and

it should be placed between the AD9884A pin and the pull-up

resistors.

Any noise that gets onto the HSYNC input trace will add jitter

to the system, so, try to minimize the trace length and try not to

run any digital or other high frequency traces near it.

Voltage Reference

Bypass with a 0.1

µF capacitor. Place it as close to the AD9884A

pin as possible. Make the ground connection as short as possible.

REFOUT is easily connected to REFIN with a short trace.

Avoid making this trace any longer than it needs to be.

When using an external reference, the REFOUT output,

while unused, still needs to be bypassed to ground with a

0.1

µF capacitor to avoid ringing.

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