AD8361

Rev. C | Page 21 of 24

EVALUATION BOARD

Figure 65 and Figure 68 show the schematic of the AD8361

evaluation board. Note that uninstalled components are drawn

in as dashed. The layout and silkscreen of the component side

are shown in Figure 66, Figure 67, Figure 69, and Figure 70. The

board is powered by a single supply in the 2.7 V to 5.5 V range.

The power supply is decoupled by 100 pF and 0.01 µF

capacitors. Additional decoupling, in the form of a series

resistor or inductor in R6, can also be added. Table 8 details the

various configuration options of the evaluation board.

Table 8. Evaluation Board Configuration Options

Component

Function

Default Condition

TP1, TP2

Ground and Supply Vector Pins.

Not Applicable

SW1

down mode. In Position B, the PWDN pin is grounded, putting the device in operating mode.

SW1 = B

SW2/SW3

Operating Mode. Selects either ground reference mode, internal reference mode or supply

reference mode. See Table 4 for more details.

SW2 = A, SW3 = B

(Ground Reference Mode)

C1, R2

Input Coupling. The 75 Ω resistor in Position R2 combines with the AD8361’s internal input

impedance to give a broadband input impedance of around 50 Ω. For more precise matching

at a particular frequency, R2 can be replaced by a different value (see Input Coupling and

Matching and Figure 43 through Figure 46).

Capacitor C1 ac couples the input signal and creates a high-pass input filter whose corner

frequency is equal to approximately 8 MHz. C1 can be increased for operation at lower

frequencies. If resistive attenuation is desired at the input, series resistor R1, which is

nominally 0 Ω, can be replaced by an appropriate value.

R2 = 75 Ω (Size 0402)

C1 = 100 pF (Size 0402)

C2, C3, R6

Power Supply Decoupling. The nominal supply decoupling of 0.01 µF and 100 pF. A series

inductor or small resistor can be placed in R6 for additional decoupling.

C2 = 0.01 µF (Size 0402)

C3 = 100 pF (Size 0402)

R6 = 0 Ω (Size 0402)

C5

Filter Capacitor. The internal 50 pF averaging capacitor can be augmented by placing a

capacitance in C5.

C5 = 1 nF (Size 0603)

C4, R5

Output Loading. Resistors and capacitors can be placed in C4 and R5 to load test V rms.

C4 = R5 = Open (Size 0603)