AD8361ART datasheet(13/24 Pages) AD

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AD8361

Rev. C | Page 13 of 24

INPUT (V rms)

5.5

1.5

0.5

0.1

0.2

0.3

0.4

4.0

3.0

2.5

2.0

5.0

4.5

3.5

1.0

0.5

0.0

5.5V

5.0V

3.0V

2.7V

0.6

0.7

0.8

Figure 40. Output Swing for Supply Voltages of

2.7 V, 3.0 V, 5.0 V and 5.5 V (MSOP Only)

Dynamic Range

Because the AD8361 is a linear-responding device with a

nominal transfer function of 7.5 V/V rms, the dynamic range in

dB is not clear from plots such as Figure 39. As the input level is

increased in constant dB steps, the output step size (per dB) also

increases. Figure 41 shows the relationship between the output

step size (i.e., mV/dB) and input voltage for a nominal transfer

function of 7.5 V/V rms.

Table 4. Connections and Nominal Transfer Function for

Ground, Internal, and Supply Reference Modes

Reference

Mode

IREF

SREF

Output

Intercept

(No Signal)

Output

Ground

VPOS

COMM

Zero

7.5 VIN

Internal

OPEN

COMM

0.350 V

7.5 VIN + 0.350 V

Supply

VPOS

VS/7.5

7.5 VIN + VS/7.5

INPUT (mV)

700

200

500

100

200

300

400

500

400

300

600

100

600

700

800

Figure 41. Idealized Output Step Size as a Function of Input Voltage

Plots of output voltage versus input voltage result in a straight

line. It may sometimes be more useful to plot the error on a

logarithmic scale, as shown in Figure 42. The deviation of the

plot for the ideal straight line characteristic is caused by output

clipping at the high end and by signal offsets at the low end. It

should however be noted that offsets at the low end can be

either positive or negative, so this plot could also trend upwards

at the low end. Figure 9, Figure 10, Figure 12, and Figure 13

show a ±3 sigma distribution of the device error for a large

population of devices.

INPUT (V rms)

2.0

–0.5

0.01

0.5

0.0

1.5

1.0

–1.0

–1.5

–2.0

1.0

1.9GHz

2.5GHz

900MHz

100MHz

0.02

(–21dBm)

0.1

(–7dBm)

0.4

(+5dBm)

Figure 42. Representative Unit, Error in dB vs. Input Level, VS = 2.7 V

It is also apparent in Figure 42 that the error plot tends to shift

to the right with increasing frequency. Because the input

impedance decreases with frequency, the voltage actually

applied to the input also tends to decrease (assuming a constant

source impedance over frequency). The dynamic range is

almost constant over frequency, but with a small decrease in

conversion gain at high frequency.

Input Coupling and Matching

The input impedance of the AD8361 decreases with increasing

frequency in both its resistive and capacitive components

(Figure 17). The resistive component varies from 225 Ω at

100 MHz down to about 95 Ω at 2.5 GHz.

A number of options exist for input matching. For operation at

multiple frequencies, a 75 Ω shunt to ground, as shown in

Figure 43, provides the best overall match. For use at a single

frequency, a resistive or a reactive match can be used. By

plotting the input impedance on a Smith Chart, the best value

for a resistive match can be calculated. The VSWR can be held

below 1.5 at frequencies up to 1 GHz, even as the input

impedance varies from part to part. (Both input impedance and

input capacitance can vary by up to ±20% around their nominal

values.) At very high frequencies (i.e., 1.8 GHz to 2.5 GHz), a

shunt resistor is not sufficient to reduce the VSWR below 1.5.

Where VSWR is critical, remove the shunt component and

insert an inductor in series with the coupling capacitor as

shown in Figure 44.

Table 5 gives recommended shunt resistor values for various

frequencies and series inductor values for high frequencies. The

coupling capacitor, CC, essentially acts as an ac-short and plays

no intentional part in the matching.

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