TDA8950J datasheet(13/39 Pages) PHILIPS

13 / 39 page

TDA8950_2

Product data sheet

Rev. 02 — 11 June 2009

13 of 39

NXP Semiconductors

TDA8950

× 150 W class-D power ampliﬁer

11. Static characteristics

[1]

VP is the supply voltage on pins VDDP1, VDDP2 and VDDA.

[2]

The circuit is DC adjusted at VP = ±12.5 V to ±42.5 V.

[3]

Unbalance protection activated when VDDA > 2 ×|VSSA| OR |VSSA| > 2 × VDDA.

[4]

With respect to SGND (0 V).

[5]

The transition between Standby and Mute modes has hysteresis, while the slope of the transition between Mute and Operating modes is

determined by the time-constant of the RC network on pin MODE; see Figure 8.

[6]

DC output offset voltage is gradually applied to the output during the transition between Mute and Operating modes. The slope caused

by any DC output offset is determined by the time-constant of the RC network on pin MODE.

[7]

At a junction temperature of approximately Tact(th_fold) − 5 °C, gain reduction commences and at a junction temperature of approximately

Tact(th_prot), the ampliﬁer switches off.

Table 8.

Static characteristics

VP = ±35 V; fosc = 345 kHz; Tamb = 25 °C; unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Supply

VP[1]

supply voltage

Operating mode

[2]

±12.5 ±30

±40

VP(ovp)

overvoltage protection supply voltage

Standby, Mute modes;

VDD − VSS

VP(uvp)

undervoltage protection supply voltage VDD − VSS

VP(ubp)

unbalance protection supply voltage

[3] -33

Iq(tot)

total quiescent current

Operating mode; no load; no

ﬁlter; no RC-snubber network

connected

5075mA

Istb

standby current

measured at 30 V

480

650

µA

Mode select input; pin MODE

VMODE

voltage on pin MODE

referenced to SGND

[4] 0-

Standby mode

[4][5] 0

0.8

Mute mode

[4][5] 2.2

3.0

Operating mode

[4][5] 4.2

input current

VI = 5.5 V

110

150

µA

Audio inputs; pins IN1M, IN1P, IN2P and IN2M

input voltage

DC input

[4] -0

-V

Ampliﬁer outputs; pins OUT1 and OUT2

VO(offset)

output offset voltage

SE; Mute mode

±25

SE; Operating mode

[6] --

±150

BTL; Mute mode

±30

BTL; Operating mode

[6] --

±210

Stabilizer output; pin STABI

VO(STABI)

output voltage on pin STABI

Mute and Operating modes;

with respect to VSSD

9.3

9.8

10.3

Temperature protection

Tact(th_prot)

thermal protection activation

temperature

154

°C

Tact(th_fold)

thermal foldback activation

temperature

closed loop SE voltage gain

reduced with 6 dB

[7] -

153

°C

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