PIC24FJ256GA110 FAMILY

DS80368N-page 2

 2008-2013 Microchip Technology Inc.

TABLE 2:

SILICON ISSUE SUMMARY

Module

Feature

Item

Number

Issue Summary

A3

A5

A6

Core

RAM Operation

1.

RAM issues in Doze mode.

X

X

X

Core

BOR

2.

BOR issues in enabled on-chip regulator.

X

JTAG

Device



Programming

3.

JTAG issues in device programming.

X

X

X

UART

—

4.

Framing errors in UART.

X

I/O

PORTB

5.

RB5 issues in open-drain operation.

X

SPI

Master mode

6.

Early one-half clock cycles.

X

CTMU

—

7.

CTMU issues as a trigger source.

X

UART

UERIF Interrupt

8.

UART error interrupt issue.

X

UART

FIFO Error Flags

9.

Error bits settings for receive FIFO.

X

SPI

Enhanced Buffer

modes

10.

Errors in enhanced buffer interrupts.

X

UART

11.

X

UART

IrDA

12.

Framing errors in 8-bit mode using IrDA

endec.

X

UART

IrDA

13.

Transmission errors in 9-bit mode using IrDA

endec.

X

Core

Instruction Set

14.

Read-After-Write stall conditions inside a

REPEAT loop.

XXX

Memory

Program Space



Visibility

15.

False error trap conditions when accessing

data in the PSV.

X

ICSP™

—

16.

Inability of the ICSP/ICD port pair to read or

program.

X

RTCC

—

17.

Unexpected decrementing of the Alarm

Repeat Counter.

X



Module

Master mode

18.

Acknowledgement issues in addressing slave

device.

X



Module

Slave mode

19.

Acknowledgement issues in Slave mode.

X

A/D Converter

—

20.

Debugging issues on 64-pin devices.

X

SPI

Enhanced Buffer

mode

21.

FIFO transfer issues in Enhanced Master

mode.

X

Core

Code Protection

22.

Applications unable to write when General

Segment Code Protection has been enabled.

X

SPI/PPS

—

23.

ALTRP/ASCK1 functionality is not supported.

X

Oscillator

LPRC

24.

Issues with LPRC automatic restart following

BOR.

X

CTMU

A/D Trigger

25.

Issues in the CTMU in triggering automatic

A/D conversion.

X

Output



Compare

—

26.

Single missed compare events under certain

conditions.

X

Interrupts

INTx

27.

External interrupts missed when writing to

INTCON2.

XXX

A/D Converter

—

28.

Module continues to draw current when

disabled.

XXX

Note 1:

Only those issues indicated in the last column apply to the current silicon revision.