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DAC3151 датащи(PDF) 39 Page - Texas Instruments |
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DAC3151 датащи(HTML) 39 Page - Texas Instruments |
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39 / 57 page ![]() DAC3151 DAC3161 DAC3171 www.ti.com SLAS959A – AUGUST 2013 – REVISED AUGUST 2013 Register name: config1 – Address: 0x01, Default: 0x600E Register Addr Default Bit Name Function Name (Hex) Value config1 0x01 15 iotest_ena Turns on the io-testing circuitry when asserted. This is the circuitry 0 that will compare a 8 sample input pattern to SIF programmed registers to make sure the data coming into the chip meets setup/hold requirements. If this bit is a ‘0’ then the clock to this circuitry is turned off for power savings. NOTE: Sample 0 should be aligned with the rising edge of SYNC. 14 reserved reserved 1 13 fullwordinterface_ena When asserted the input interface is changed to use the full 14-bits 1 for each word, instead of dual 8-bit buses for two half words. Note: fixed to "1" for DAC3151/DAC3161. 12 64cnt_ena This enables the resetting of the alarms after 64 good samples with 0 the goal of removing unnecessary errors. For instance on a lab board, when checking the setup/hold through IO TEST, there may initially be errors, but once the test is up and running everything works. Setting this bit removes the need for a SIF write to clear the alarm register. 11 dacclkgone_ena This allows the DACCLK gone signal from the clock monitor to be 0 used to shut the output off. 10 dataclkgone_ena This allows the DATACLK gone signal from the clock monitor to be 0 used to shut the output off. 9 collision_ena This allows the collision alarm from the FIFO to shut the output off 0 8 reserved reserved. 0 7 daca_compliment When asserted the output to the DACA is complimented. This 0 allows the user of the chip to effectively change the + and – designations of the DAC output pins. 6 reserved reserved 0 5 sif_sync This is the SIF_SYNC signal. Whatever is programmed into this 0 bitwill be used as the chip sync when SIF_SYNC mode is enabled.Design is sensitive to rising edges so programming from 0- >1 is when the sync pulse is generated. 1->0 has no effect. 4 sif_sync_ena When asserted enable SIF_SYNC mode. 0 3 alarm_2away_ena When asserted alarms from the FIFO that represent the pointers 1 being 2 away are enabled 2 alarm_1away_ena When asserted alarms from the FIFO that represent the pointers 1 being 1 away are enabled 1 alarm_collision_ena When asserted the collision of FIFO pointers causes an alarm to be 1 generated 0 reserved reserved 0 Register name: config2 – Address: 0x02, Default: 0x3FFF Register Addr Bit Name Function Default Value Name (Hex) config2 0x02 15 reserved reserved. 0 14 reserved reserved. 0 13:0 lvdsdata_ena These 14 bits are individual enables for the 14 input pin receivers. 0x3FFF Note: for DAC3171 7-bit input interface mode, it is recommended to turn off bits(6:0). Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 39 Product Folder Links: DAC3151 DAC3161 DAC3171 |
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