M68HC08 datasheet(64/332 Pages) FREESCALE

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FLASH Memory

Technical Data

MC68HC908JB16 — Rev. 1.1

FLASH Memory

Freescale Semiconductor

4.7 FLASH Program Operation

Programming of the FLASH memory is done on a row basis. A row

consists of 64 consecutive bytes starting from addresses $XX00,

$XX40, $XX80 or $XXC0. The procedure for programming a row of the

FLASH memory is outlined below:

1. Set the PGM bit. This configures the memory for program

operation and enables the latching of address and data for

programming.

2. Write any data to any FLASH address within the address range of

the row to be programmed.

3. Wait for a time, tnvs (5µs).

4. Set the HVEN bit.

5. Wait for a time, tpgs (10µs).

6. Write data to the byte being programmed.

7. Wait for time, tProg (30µs).

8. Repeat steps 6 and 7 until all the bytes within the row are

programmed.

9. Clear the PGM bit.

10. Wait for time, tnvh (5µs).

11. Clear the HVEN bit.

12. After time, trcv (1µs), the memory can be accessed in read mode

again.

This program sequence is repeated throughout the memory until all data

is programmed.

NOTE:

Programming and erasing of FLASH locations cannot be performed by

executing code from the FLASH memory; the code must be executed

from RAM. While these operations must be performed in the order as

shown, but other unrelated operations may occur between the steps. Do

not exceed tProg maximum. See 20.14 FLASH Memory

Characteristics.

Figure 4-3 shows a flowchart representation for programming the

FLASH memory.

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