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STM8S003F3P6 датащи(PDF) 57 Page - STMicroelectronics |
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STM8S003F3P6 датащи(HTML) 57 Page - STMicroelectronics |
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57 / 100 page ![]() (3) Measured from interrupt event to interrupt vector fetch. (4) Configured by the REGAH bit in the CLK_ICKR register. (5) Configured by the AHALT bit in the FLASH_CR1 register. (6) Plus 1 LSI clock depending on synchronization. Total current consumption and timing in forced reset state 9.3.2.6 Table 29: Total current consumption and timing in forced reset state Unit Max (1) Typ Conditions Parameter Symbol μA 400 VDD = 5 V Supply current in reset state (2) IDD(R) 300 VDD = 3.3 V μs 150 Reset pin release to vector fetch tRESETBL (1) Data guaranteed by design, not tested in production. (2) Characterized with all I/Os tied to V SS. Current consumption of on-chip peripherals 9.3.2.7 Subject to general operating conditions for VDD and TA. HSI internal RC/fCPU = fMASTER = 16 MHz, VDD = 5 V Table 30: Peripheral current consumption Unit Typ. Parameter Symbol μA 210 TIM1 supply current (1) IDD(TIM1) 130 TIM2 supply current (1) IDD(TIM2) 50 TIM4 timer supply current (1) IDD(TIM4) 120 UART1 supply current (2) IDD(UART1) 45 SPI supply current (2) IDD(SPI) 65 I 2C supply current(2) IDD(I2C) 1000 ADC1 supply current when converting (3) IDD(ADC1) 57/100 DocID018576 Rev 3 Electrical characteristics STM8S003K3 STM8S003F3 |
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