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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32F030C8 датащи(PDF) 66 Page - STMicroelectronics |
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STM32F030C8 датащи(HTML) 66 Page - STMicroelectronics |
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66 / 88 page  Electrical characteristics STM32F030x4 STM32F030x6 STM32F030x8 66/88 DocID024849 Rev 1 Figure 20. ADC accuracy characteristics Figure 21. Typical connection diagram using the ADC 1. Refer to Table 48: ADC characteristics for the values of RAIN, RADC and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy this, fADC should be reduced. General PCB design guidelines Power supply decoupling should be performed as shown in Figure 10: Power supply scheme. The 10 nF capacitor should be ceramic (good quality) and it should be placed as close as possible to the chip. EO EG 1LSBIDEAL (1) Example of an actual transfer curve (2) The ideal transfer curve (3) End point correlation line ET=Total Unadjusted Error: maximum deviation between the actual and the ideal transfer curves. EO=Offset Error: deviation between the first actual transition and the first ideal one. EG=Gain Error: deviation between the last ideal transition and the last actual one. ED=Differential Linearity Error: maximum deviation between actual steps and the ideal one. EL=Integral Linearity Error: maximum deviation between any actual transition and the end point correlation line. 4095 4094 4093 5 4 3 2 1 0 7 6 12 3 4 5 6 7 4093 4094 4095 4096 (1) (2) ET ED EL (3) VDDA VSSA MS19880V1 1LSBIDEAL 4096 VDDA MS19881V2 VDDA AINx IL±1 μA 0.6 V VT RAIN(1) Cparasitic VAIN 0.6 V VT RADC 12-bit converter CADC Sample and hold ADC converter |
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