t0

t3

t2

t1

VSET is programmed and takes effect

immediately. LM3263 initializes and

powers up internal circuit blocks.

Transmit Slot Boundary. DC-DC

output settled (95%).

VBATT applied, VIO = 0V.

LM3263 in Shutdown.

t4

VIO

RFFE write

SMPS_CFG= auto PFM

(Reg 01h = 20h)

SDATA

VOUT

3.4V

0V

t0

t4

t3

t2

t1

VIO applied.150 ns later LM3263 is in

Low Power and RFFE configuration

writes may occur. Trigger Mask Bits

are set.

DC-DC is active in normal mode.

VBATT

5 Ps (min)

25 Ps max

50 Ps max

RFFE write

(Reg 03h = E3h)

APT

Active

Shutdown

Low Power

Initialization

SW

RFFE write

PM_TRIG

(Reg 1Ch = 38h)

LM3263

SNVS837 – JUNE 2013

www.ti.com

Thermal Overload Protection

The LM3263 IC has a thermal overload protection that protects itself from short-term misuse and overload

conditions. If the junction temperature exceeds 150°C, the LM3263 shuts down. Normal operation resumes after

the temperature drops below 125°C. Prolonged operation in thermal overload condition may damage the device

and is therefore not recommended.

Startup

The

waveform

in

Figure

21

shows

the

startup

sequence

and

sample

condition.

First,

VBATT

(=PVIN=SVDD=PACB) should take on a value between 2.7V and 5.5V. After VBATT is ensured to be beyond

2.7V, VIO can be set 1.8V. Next, setting PM_TRIG [7:6] to 38h will enable Active mode. Finally, VSET can be

programmed to a value that corresponds to the desired output voltage. The LM3263 output voltage will then go

to the programmed VSET value. To optimize the startup time and behavior of the output voltage, the LM3263 will

start up in PWM mode even when the operating mode selected is Auto-PFM mode (SMPS_CFG [5] set to 1b) if

the output load current is

≤ 60 mA (min.), the LM3263 will then seamlessly transition into PFM mode.

Figure 21. Non-Triggered Startup Sequence

16

Submit Documentation Feedback

Copyright © 2013, Texas Instruments Incorporated

Product Folder Links: LM3263