PCM1606

SLES014B − OCTOBER 2001 − REVISED AUGUST 2002

5

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PARAMETER

TEST CONDITIONS

PCM1606E

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

DIGITAL FILTER PERFORMANCE

FILTER CHARACTERISTICS

Passband

±0.03 dB

0.454 fS

Passband

−3 dB

0.487 fS

Stopband

0.546 fS

Passband ripple

±0.03

dB

Stopband attenuation

Stopband = 0.546 fS

−50

dB

Stopband attenuation

Stopband = 0.567 fS

−55

dB

ANALOG FILTER PERFORMANCE

Frequency response

At 20 kHz

−0.03

dB

POWER SUPPLY REQUIREMENTS (see Note 4)

VCC

Voltage range

4.5

5

5.5

VDC

fS = 44.1 kHz/384 fS

50

65

ICC

Supply current

fS = 96 kHz/256 fS

72

mA

ICC

Supply current

fS = 192 kHz/128 fS

68

mA

fS = 44.1 kHz/384 fS

250

358

Power dissipation

fS = 96 kHz/256 fS

360

mW

Power dissipation

fS = 192 kHz/128 fS

340

mW

TEMPERATURE RANGE

Operation temperature

−25

85

°C

θJA

Thermal resistance

20-pin SSOP

115

°C/W

NOTES:

3. Analog performance specs are tested using System Two Cascade Plus by Audio Precision with 400-Hz HPF, 30-kHz LPF on at RMS

with 20-kHz LPF, 400-Hz HPF in calculation.

Shibasoku #725 THD meter, 400 Hz HPF, 30 kHz LPF on, at average mode with 20-kHz bandwidth limiting. The load connected

to the analog output is 5 k

Ω or larger via capacitance coupling.

4. Condition in 192-kHz operation is channel 3 through channel 6 are disabled.

timing requirements

system clock input

The PCM1606 requires a system clock for operating the digital interpolation filters and multilevel delta-sigma

modulators. The system clock is applied at the SCKI (pin 20). Table 1 shows examples of system clock

frequencies for common audio sampling rates.

Figure 1 shows the timing requirements for the system clock input. For optimal performance, it is important to

use a clock source with low phase jitter and noise. Texas Instruments’ PLL1700 multiclock generator is an

excellent choice for providing the PCM1606 system clock source.