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MPC5607B датащи(PDF) 80 Page - Freescale Semiconductor, Inc |
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MPC5607B датащи(HTML) 80 Page - Freescale Semiconductor, Inc |
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80 / 110 page ![]() MPC5607B Microcontroller Data Sheet, Rev. 6 Electrical characteristics Freescale Semiconductor 80 RSW1 CC D Internal resistance of analog source —— — 3 k RSW2 CC D Internal resistance of analog source — — — 2 k RAD CC D Internal resistance of analog source —— — 2 k IINJ SR — Input current Injection Current injection on one ADC_0 input, different from the converted one VDD = 3.3 V ± 10% 5— 5 mA VDD = 5.0 V ± 10% 5 — 5 | INL | CC T Absolute integral nonlinearity No overload — 0.5 1.5 LSB | DNL | CC T Absolute differential nonlinearity No overload — 0.5 1.0 LSB | EO | CC T Absolute offset error — — 0.5 — LSB | EG | CC T Absolute gain error —— 0.6 — LSB TUEP CC P Total unadjusted error7 for precise channels, input only pins Without current injection 2 0.6 2 LSB T With current injection 3 — 3 TUEX CC T Total unadjusted error7 for extended channel Without current injection 3 1 3 LSB T With current injection 4 4 1 V DD = 3.3 V ± 10% / 5.0 V ± 10%, TA = 40 to 125 °C, unless otherwise specified. 2 Analog and digital V SS must be common (to be tied together externally). 3 V AINx may exceed VSS_ADC0 and VDD_ADC0 limits, remaining on absolute maximum ratings, but the results of the conversion will be clamped respectively to 0x000 or 0x3FF. 4 Duty cycle is ensured by using system clock without prescaling. When ADCLKSEL = 0, the duty cycle is ensured by internal divider by 2. 5 During the sampling time the input capacitance C S can be charged/discharged by the external source. The internal resistance of the analog source must allow the capacitance to reach its final voltage level within tADC0_S. After the end of the sampling time tADC0_S, changes of the analog input voltage have no effect on the conversion result. Values for the sampling clock tADC0_S depend on programming. 6 This parameter does not include the sampling time t ADC0_S, but only the time for determining the digital result and the time to load the result’s register with the conversion result. 7 Total Unadjusted Error: The maximum error that occurs without adjusting Offset and Gain errors. This error is a combination of Offset, Gain and Integral Linearity errors. Table 44. ADC_0 conversion characteristics (10-bit ADC_0) (continued) Symbol C Parameter Conditions1 Value Unit Min Typ Max |
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