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AD652KPZ датащи(PDF) 13 Page - Analog Devices |
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AD652KPZ датащи(HTML) 13 Page - Analog Devices |
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13 / 28 page ![]() AD652 Rev. C | Page 13 of 28 The one-shot capacitor controls the pulse width of the frequency output. The pulse is initiated by the rising edge of the clock signal. The delay time between the rising edge of the clock and the falling edge of the frequency output is typically 200 ns. The width of the pulse is 5 ns/pF, and the minimum width is about 200 ns with Pin 9 floating. If the one-shot period is accidentally chosen longer than the clock period, the width of the pulse defaults to equal the clock period. The one-shot can be disabled by connecting Pin 9 to +VS (Figure 17); the output pulse width is then equal to the clock period. The one-shot is activated (Figure 18) by connecting a capacitor from Pin 9 to +VS, −VS, or Digital Ground (+VS is preferred). 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ONE SHOT AND "D" FLOP QCK D Q 1mA 20k Ω AD652 SYNCHRONOUS VOLTAGE-TO- FREQUENCY CONVERTER 5V REFERENCE +VS Figure 17. One-Shot Disabled 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ONE SHOT AND "D" FLOP QCK D Q 1mA 20k Ω AD652 SYNCHRONOUS VOLTAGE-TO- FREQUENCY CONVERTER 5V REFERENCE COS ANY AC GND (+VS,–VS, OR DIGITAL GND) Figure 18. One-Shot Enabled DIGITAL GROUND Digital Ground can be at any potential between −VS and (+VS – 4 V). This can be very useful in systems with derived grounds rather than stiff supplies. For example, in a small isolated power circuit, often only a single supply is generated and the ground is set by a divider tap. Such a ground cannot handle the large currents associated with digital signals. With the AD652 SVFC, it is possible to connect the Digital Ground to –VS for a solid logic reference, as shown in Figure 19. +VS 1 2 3 4 – + 5 6 7 VIN 8 16 15 14 13 12 11 10 9 ONE SHOT AND "D" FLOP QCK D Q 1mA 20k Ω AD652 SYNCHRONOUS VOLTAGE-TO- FREQUENCY CONVERTER 5V REFERENCE RL 5V CLOCK FREQ OUT CINT COS –VS Figure 19. Digital GND at −VS |
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