WM8953ECSSLASHRV datasheet(59/100 Pages) WOLFSON

номер детали	WM8953ECS/RV

подробное описание детали	Low Power Stereo ADC with PLL and TDM Interface

PDF	100 Pages

Scroll/Zoom	100%

производитель	WOLFSON [Wolfson Microelectronics plc]

домашняя страница	http://www.wolfsonmicro.com

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59 / 100 page

Production Data

WM8953

PD, January 2009, Rev 4.0

AUDIO DATA FORMATS (NORMAL MODE)

In Right Justified mode, the LSB is available on the last rising edge of BCLK before a ADCLRC

transition. All other bits are transmitted before (MSB first). Depending on word length, BCLK

frequency and sample rate, there may be unused BCLK cycles after each ADCLRC transition.

Figure 35 Right Justified Audio Interface (assuming n-bit word length)

In Left Justified mode, the MSB is available on the first rising edge of BCLK following a ADCLRC

transition. The other bits up to the LSB are then transmitted in order. Depending on word length,

BCLK frequency and sample rate, there may be unused BCLK cycles before each ADCLRC

transition.

Figure 36 Left Justified Audio Interface (assuming n-bit word length)

In I2S mode, the MSB is available on the second rising edge of BCLK following a ADCLRC transition.

The other bits up to the LSB are then transmitted in order. Depending on word length, BCLK

frequency and sample rate, there may be unused BCLK cycles between the LSB of one sample and

the MSB of the next.

Figure 37 I2S Justified Audio Interface (assuming n-bit word length)

WM8953ECS/RV датащи(PDF) 59 Page - Wolfson Microelectronics plc