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Copyright © 2010 Future Technology Devices International Limited

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Document Reference No.: FT_000164

V2DIP2-32 VNCL2-32Q Development Module Datasheet Version 1.01

Clearance No.: FTDI# 151

3.4 UART Interface

When the data and control buses are configured in UART mode, the interface implements a standard

asynchronous serial UART port with flow control. The UART can support baud rates from 300baud to

3Mbaud. The UART interface is described more fully in a Vinculum-II datasheet please refer to:- FTDI

website

3.4.1

Signal Description – UART Interface

The UART signals can be programmed to a choice of available I/O pins. Table 3.3 explains the available

pins for each of the UART signals.

Available Pins

Name

Type

Description

J2-10, J1-6, J1-11

uart_txd

Output

Transmit asynchronous data output

J2-9, J1-8, J1-12

uart_rxd

Input

Receive asynchronous data input

J2-8, J1-9, J2-12

uart_rts#

Output

Request To Send Control Output

J2-6, J1-10, J2-11

uart_cts#

Input

Clear To Send Control Input

J2-10, J1-6, J1-11

uart_dtr#

Output

Data Acknowledge (Data Terminal

Ready Control) Output

J2-9, J1-8, J1-12

uart_dsr#

Input

Data Request (Data Set Ready

Control) Input

J2-8, J1-9, J2-12

uart_dcd#

Input

Data Carrier Detect Control Input

J2-6, J1-10, J2-11

uart_ri#

Input

Ring Indicator Control Input. RI# low

can be used to resume the PC USB

Host controller from suspend.

J2-10, J1-6, J1-11

uart_tx_active

Output

Enable Transmit Data for RS485

designs.

signal that a transmit operation is in

progress. The TXDEN signal will be

set high one bit-time before data is

transmitted and return low one bit

time after the last bit of a data frame

has been transmitted

Table 3.3 - Data and Control Bus Signal Mode Options – UART