PCAL9554B datasheet(17/42 Pages) NXP

номер детали	PCAL9554B

подробное описание детали	Low-voltage 8-bit I2C-bus and SMBus low power I/O port with interrupt, weak pull-up and Agile I/O

PDF	42 Pages

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производитель	NXP [NXP Semiconductors]

домашняя страница	http://www.nxp.com

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17 / 42 page

PCAL9554B_PCAL9554C

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Product data sheet

Rev. 2 — 10 December 2012

17 of 42

NXP Semiconductors

PCAL9554B; PCAL9554C

Low-voltage 8-bit I2C-bus/SMBus low power I/O port

Reducing the current drive capability may be desirable to reduce system noise. When the

output switches (transitions from H/L), there is a peak current that is a function of the

output drive selection. This peak current runs through VDD and VSS package inductance

and will create noise (some radiated, but more critically Simultaneous Switching Noise

(SSN)). In other words, switching many outputs at the same time will create ground and

supply noise. The output drive strength control through the Current Control registers

allows the user to mitigate SSN issues without the need of additional external

components.

8.3 12 V tolerant I/Os

The PCAL9554B/PCAL9554C device SCR group reference diode can go up to 10 V

before latch back to 8 V. The ESD gate oxide will protect the device, but not if used

continually. Therefore, to achieve 12 V tolerant I/Os, the external protection circuitry

(diode) must be used as shown in Figure 16.

Fig 16. External protection circuitry

PCAL9554B

PCAL9554C

VDD

SDA

SCL

INT

VSS

002aah210

+5 V

+12 V

PCAL9554B датащи(PDF) 17 Page - NXP Semiconductors