OR3C55 datasheet(49/210 Pages) AGERE

49 / 210 page

Lucent Technologies Inc.

Data Sheet

June 1999

ORCA Series 3C and 3T FPGAs

High-Level Routing Resources (continued)

PIC Interquad (MID) Routing

There is also connectivity between the PICs in each

quadrant, as well as a clock control (CLKCNTRL) mod-

ule (discussed in the Special Function Blocks section)

between the PIC routing and the interquad routing.

These blocks are called LMID (left), TMID (top), RMID

(right), and BMID (bottom). The TMID routing is shown

in Figure 30. As with the hIQ and vIQ blocks, the only

connectivity to the PIC routing is to the global pxH and

px5 segments.

The pxH segments from the one quadrant can be con-

nected through a CIP to its counterpart in the opposite

quadrant, providing a path that spans the array of

PICs. Since a passive CIP is used to connect the two

pxH segments, a 3-state signal can be routed on the

two pxH segments in the opposite quadrants, and then

connected through this CIP. As with the hIQ and vIQ

blocks, CIPs and buffers allow nibble-wide connections

between the interquad segments, the xH segments,

and the x5 segments.

5-5822(F)

Figure 30. Top (TMID) Routing

EXPRESSCLK RIGHT

PIC LOCAL CLOCKS

pxL[9:0]

pxH[7:0]

px5[9:0]

px1[4:0]

pSW[7:4]

pSW[3:0]

pSW[7:4]

pSW[3:0]

px2[4:0]

in2[A:D] FROM LEFT

in[A:D] FROM RIGHT

CORNER ExpressCLK

FROM RIGHT

FROM LEFT

EXPRESSCLK LEFT

SHUTOFF

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