SSM2163

REV. 0

–16–

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

28-Pin Plastic DIP

(N-28)

28

1

14

15

1.565 (39.70)

1.380 (35.10)

0.580 (14.73)

0.485 (12.32)

PIN 1

0.022 (0.558)

0.014 (0.356)

0.060 (1.52)

0.015 (0.38)

0.200 (5.05)

0.125 (3.18)

0.150

(3.81)

MIN

SEATING

PLANE

0.250

(6.35)

MAX

0.100

(2.54)

BSC

0.070

(1.77)

MAX

0.015 (0.381)

0.008 (0.204)

0.195 (4.95)

0.125 (3.18)

0.625 (15.87)

0.600 (15.24)

28-Pin SOIC

(R-28)

SEATING

PLANE

0.0118 (0.30)

0.0040 (0.10)

0.0192 (0.49)

0.0138 (0.35)

0.1043 (2.65)

0.0926 (2.35)

0.0500

(1.27)

BSC

0.0125 (0.32)

0.0091 (0.23)

0.0500 (1.27)

0.0157 (0.40)

8

°

0

°

0.0291 (0.74)

0.0098 (0.25)

x 45

°

0.7125 (18.10)

0.6969 (17.70)

PIN 1

29

15

14

1

number stored in LEVEL_VALUE is the attenuation value,

expressed in –dB, so larger values will decrease volume. Also,

the register must not be allowed to increment beyond 7FH

because the MSB will be set and the SSM2163 will interpret

the value as an address. Therefore, the two highest bits of

LEVEL_VALUE should be cleared by ANDing the register

with 3FH.)

If the

µC’s hardware serial port is being user for other purposes,

the SSM2163 can be loaded by using the parallel port. A typical

parallel interface is shown in Figure 31. The serial data is

transmitted to the SSM2163 via the 80C51’s Port 1.6 output,

while Port 1.5 acts as the serial clock.

P1.6

P1.5

P1.4

P1.3

80C51 µC

+5V

10k

DATA IN

CLK

WRITE

LD

SYSMUTE

SSM2163

NOTE: ADDITIONAL PINS OMITTED FOR CLARITY

Figure 31. An SSM2163 to 80C51

µC Interface Using

Parallel Port 1

Software for the interface of Figure 31 is straightforward.

Typically, the

µC will repeatedly shift the value to be sent, for

example from register LEVEL_VALUE, into the carry bit. Port

P1.6 is then set or reset based on the carry bit, and Port P1.5 is

strobed low and then high to create a clock pulse. After eight

loops, the value will have been sent to the SSM2163. Note that

all eight bits should be sent, even though only six bits are

significant. If only six bits are shifted in, the two low order bits

of the previous value will remain in the MSBs of the shift

register. If this action results in the MSB being a one, the

SSM2163 will interpret this as an address and unpredictable

results will occur.