поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

STM32F102xB датащи(PDF) 54 Page - STMicroelectronics

номер детали STM32F102xB
подробное описание детали  Medium-density USB access line,ARM-based 32b MCU with 64/128KB Flash,USB FS interface,6 timers, ADC&8 com. interfaces
PDF  76 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F102xB датащи(HTML) 54 Page - STMicroelectronics

Back Button STM32F102xB Datasheet HTML 50Page - STMicroelectronics STM32F102xB Datasheet HTML 51Page - STMicroelectronics STM32F102xB Datasheet HTML 52Page - STMicroelectronics STM32F102xB Datasheet HTML 53Page - STMicroelectronics STM32F102xB Datasheet HTML 54Page - STMicroelectronics STM32F102xB Datasheet HTML 55Page - STMicroelectronics STM32F102xB Datasheet HTML 56Page - STMicroelectronics STM32F102xB Datasheet HTML 57Page - STMicroelectronics STM32F102xB Datasheet HTML 58Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 54 / 76 page
background image
Electrical characteristics
STM32F102x8, STM32F102xB
54/76
Doc ID 15056 Rev 4
Figure 24.
I/O AC characteristics definition
5.3.14
NRST pin characteristics
The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up
resistor, RPU (see Table 34).
Unless otherwise specified, the parameters given in Table 37 are derived from tests
performed under ambient temperature and VDD supply voltage conditions summarized in
Table 8.
Figure 25.
Recommended NRST pin
protection
ai14131
10%
90%
50%
tr(IO)out
OUTPUT
EXT ERNAL
ON 50pF
Maximum fr equency is achieved if (tr + tf) 2/3)T and if the duty cycle is (45-55%)
10%
50%
90%
when loaded by 50pF
T
tr(IO)out
Table 37.
NRST pin characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL(NRST)
(1)
1.
Guaranteed by design, not tested in production.
NRST Input low level voltage
–0.5
0.8
V
VIH(NRST)
(1)
NRST Input high level voltage
2
VDD+0.5
Vhys(NRST)
NRST Schmitt trigger voltage
hysteresis
200
mV
RPU
Weak pull-up equivalent resistor(2)
2.
The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution
to the series resistance must be minimum
(~10% order)
.
VIN = VSS
30
40
50
k
Ω
VF(NRST)
(1)
NRST Input filtered pulse
100
ns
VNF(NRST)
(1)
NRST Input not filtered pulse
300
ns
ai14132c
STM32Fxxx
RPU
NRST(2)
VDD
Filter
Internal Reset
0.1 μF
External
reset circuit(1)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com