SWRS126-004

Host capture

CC3000 launch

CC3000 capture

Host launch

T

c

lk

SPI_CLK

(at device die)

SPI_DIN

(data from host to device)

SPI_DOUT

(data from

host)

device to

SWRS126-016

MCU SPI

master

CC3000

SPI slave

SPI_CLK

SPI_CS

SPI_IRQ

SPI_DOUT

SPI_DIN

CC3000MOD

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SWRS126 – NOVEMBER 2012

SPI HOST CONTROLLER INTERFACE

The SPI is the primary host interface to the CC3000 module.

The SPI interface contains the five-line, master and slave communication model shown in Figure 3.

Figure 3. SPI Host Connectivity

Table 3 highlights the CC3000 SPI pin names and functions.

Table 3. SPI Line Description

Pin Name

Description

SPI_CLK

Clock (0 to 16 MHz) from host to slave

CS (active low) signal from host to slave

SPI_DIN

Data from host to slave

Interrupt from slave to host

SPI_DOUT

Data from slave to host

(1)

SPI_CS selects a CC3000 module, indicating that a master wants to communicate to the device.

(2)

SPI_IRQ is a dual-purpose slave to the master direction line: in SPI IDLE state while no data transfer is active, driving SPI_IRQ low

indicates to the master that the CC3000 module has data to pass to it; driving SPI_IRQ low following SPI_CS deassertion indicates that

the CC3000 module is ready to receive data.

SPI Timing

Figure 4 shows the SPI timing sequence.

Figure 4. SPI Timing Sequence

Copyright © 2012, Texas Instruments Incorporated

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