THS4532

SLOS829 – FEBRUARY 2013

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

TRANSPORT

SPECIFIED

CHANNEL

PACKAGE-

PACKAGE

PACKAGE

ORDERING

MEDIA,

PRODUCT

TEMPERATURE

COUNT

LEAD

DESIGNATOR

MARKING

NUMBER

RANGE

QUANTITY

2

THS4532

THS4532IPWT

Rails, 90

THS4532

TSSOP-16

PW

–40°C to +125°C

2

THS4532

THS4532IPWR

Tape and reel, 2000

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

VALUE

UNITS

MIN

MAX

5.5

V

V

1

V

50

mA

0.75

mA

Continuous power dissipation

See the Thermal Information

150

°C

–40

+125

°C

–65

+150

°C

Electrostatic

Human body model (HBM)

2.5

kV

discharge (ESD)

Charge device model (CDM)

500

V

ratings:

THERMAL INFORMATION

TSSOP

(PW)

UNITS

16 PINS

Junction-to-ambient thermal resistance

122.4

Junction-to-case (top) thermal resistance

61.2

Junction-to-board thermal resistance

66.7

°C/W

Junction-to-top characterization parameter

14.4

Junction-to-board characterization parameter

66.2

Junction-to-case (bottom) thermal resistance

N/A

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

2

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