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ADSP2181 датащи(PDF) 22 Page - Analog Devices |
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ADSP2181 датащи(HTML) 22 Page - Analog Devices |
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22 / 32 page ![]() REV. D ADSP-2181 –22– Parameter Min Max Unit IDMA Write, Long Write Cycle Timing Requirements: tIKW IACK Low before Start of Write1 0ns tIKSU IAD15–0 Data Setup before IACK Low2, 3 0.5tCK + 10 ns tIKH IAD15–0 Data Hold after IACK Low2, 3 2ns Switching Characteristics: tIKLW Start of Write to IACK Low4 1.5tCK ns tIKHW Start of Write to IACK High 15 ns NOTES 1Start of Write = IS Low and IWR Low. 2If Write Pulse ends before IACK Low, use specifications t IDSU, tIDH. 3If Write Pulse ends after IACK Low, use specifications t IKSU, tIKH . 4This is the earliest time for IACK Low from Start of Write. For IDMA Write cycle relationships, please refer to the User’s Manual. IAD15–0 DATA tIKHW tIKW IACK IS IWR tIKLW tIKH tIKSU Figure 16. IDMA Write, Long Write Cycle |
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