ADM1024 datasheet(17/28 Pages) AD

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ADM1024

–17–

REV. 0

measurement. Therefore, if the start of a fan measurement just

misses a rising edge, the measurement can take almost three tach

periods. In order to read a valid result from the fan value registers,

the total monitoring time allowed after starting the monitor-

ing cycle should, therefore, be three tach periods of FAN1 plus

three tach periods of FAN2 at the lowest normal fan speed.

Although the fan monitoring cycle and the analog input monitoring

cycle are started together, they are not synchronized in any

other way.

FAN MANUFACTURERS

Manufacturers of cooling fans with tachometer outputs are

listed below:

NMB Tech

9730 Independence Ave.

Chatsworth, California 91311

Phone: 818-341-3355; Fax: 818-341-8207

Airflow

Model

Frame Size

CFM

2408NL

2.36 in sq.

× 0.79 in (60 mm sq. × 20 mm)

9–16

2410ML 2.36 in sq.

× 0.98 in (60 mm sq. × 25 mm) 14–25

3108NL

3.15 in sq.

× 0.79 in (80 mm sq. × 20 mm) 25–42

3110KL

3.15 in sq.

× 0.98 in (80 mm sq. × 25 mm) 25–40

Mechatronics Inc.

P.O. Box 613

Preston, WA 98050

800-453-4569

Models—Various sizes available with tach output option.

Sanyo Denki, America, Inc.

468 Amapola Avenue

Torrance, CA 90501

310-783-5400

Models—109P Series

CHASSIS INTRUSION INPUT

The Chassis Intrusion input is an active high input/open-drain

output intended for detection and signalling of unauthorized

tampering with the system. An external circuit powered from

the system’s CMOS backup battery is used to detect and latch a

chassis intrusion event, whether or not the system is powered

up. Once a chassis intrusion has been detected and latched, the

CI input will generate an interrupt when the system is powered up.

The actual detection of chassis intrusion is performed by an

external circuit that will, for example, detect when the cover

has been removed. A wide variety of techniques may be used for

the detection, for example:

• Microswitch that opens or closes when the cover is removed.

• Reed switch operated by magnet ﬁxed to the cover.

• Hall-effect switch operated by magnet ﬁxed to the cover.

• Phototransistor that detects light when cover is removed.

The chassis intrusion interrupt will remain asserted until the

external detection circuit is reset. This can be achieved by setting

Bit 7 of the Chassis Intrusion Clear Register to one, which will

cause the CI pin to be pulled low for at least 20 ms. This regis-

ter bit is self-clearing.

The chassis intrusion circuit should be designed so that it can be

reset by pulling its output low. A suitable chassis intrusion circuit

using a phototransistor is shown in Figure 19. Light falling on

the phototransistor when the PC cover is removed will cause it

to turn on and pull up the input of N1, thus setting the latch

N3/N4. After the cover is replaced, a low reset on the CI output

will pull down the input of N4, resetting the latch.

74HC132

100k

10k

MRD901

470k

1N914

CMOS

BACKUP

BATTERY

1N914

Figure 19. Chassis Intrusion Detector and Latch

The Chassis Intrusion input can also be used for other types of

alarm input. Figure 20 shows a temperature alarm circuit using

an AD22105 temperature switch sensor. This produces a low-

going output when the preset temperature is exceeded, so the

output is inverted by Q1 to make it compatible with the CI input.

Q1 can by almost any small-signal NPN transistor, or a TTL

or CMOS inverter gate may be used if one is available. See the

AD22105 data sheet for information on selecting RSET.

AD22105

TEMPERATURE

SENSOR

VCC

10k

RSET

Figure 20. Using the CI Input with a Temperature Sensor

Note: The chassis intrusion input does not have a protective

clamp diode to VCC, as this could pull down the chassis intru-

sion latch and reset it when the ADM1024 was powered down.

THE ADM1024 INTERRUPT STRUCTURE

The Interrupt Structure of the ADM1024 is shown in Figure 21.

As each measurement value is obtained and stored in the

appropriate value register, the value and the limits from the

corresponding limit registers are fed to the high and low limit

comparators. The result of each comparison (1 = out of limit,

0 = in limit) is routed to the corresponding bit input of the

Interrupt Status Registers via a data demultiplexer, and used to

set that bit high or low as appropriate.

The Interrupt Mask Registers have bits corresponding to each of

the Interrupt Status Register Bits. Setting an Interrupt Mask Bit

high forces the corresponding Status Bit output low, while setting

an Interrupt Mask Bit low allows the corresponding Status Bit

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