ADG784BCP datasheet(3/8 Pages) AD

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REV. 0

–3–

ADG784

B Version

TMIN to

Parameter

25 CTMAX

Unit

Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range

0 V to VDD

On Resistance (RON)4

Ω typ

VD = 0 V to VDD, IS = –10 mA

Ω max

On Resistance Match Between

Channels (

∆R

ON)0.15

Ω typ

VD = 0 V to VDD, IS = –10 mA

0.5

Ω max

On Resistance Flatness (RFLAT(ON))

2Ω typ

VD = 0 V to VDD, IS = –10 mA

Ω max

LEAKAGE CURRENTS

Source OFF Leakage IS (OFF)

±0.01

nA typ

VD = 3 V, VS = 1 V; VD = 1 V, VS = 3 V;

±0.5

±1

nA max

Test Circuit 2

Drain OFF Leakage ID (OFF)

±0.01

nA typ

VD = 3 V, VS = 1 V; VD = 1 V, VS = 3 V;

±0.5

±1

nA max

Test Circuit 2

Channel ON Leakage ID, IS (ON)

±0.01

nA typ

VD = VS = 3 V; VD = VS = 1 V; Test Circuit 3

±0.5

±1

nA max

DIGITAL INPUTS

Input High Voltage, VINH

2.0

V min

Input Low Voltage, VINL

0.4

V max

Input Current

IINL or IINH

0.001

µA typ

VIN = VINL or VINH

±0.5

µA max

DYNAMIC CHARACTERISTICS2

tON

ns typ

RL = 100

Ω, CL = 35 pF,

ns max

VS = 1.5 V; Test Circuit 4

tOFF

ns typ

RL = 100

Ω, C

L = 35 pF,

ns max

VS = 1.5 V; Test Circuit 4

Break-Before-Make Time Delay, tD

ns typ

RL = 100

Ω, CL = 35 pF,

ns min

VS1 = VS2 = 3 V; Test Circuit 5

Off Isolation

–65

dB typ

RL = 50

Ω, f = 10 MHz; Test Circuit 7

Channel-to-Channel Crosstalk

–75

dB typ

RL = 50

Ω, f = 10 MHz; Test Circuit 8

Bandwidth –3 dB

240

MHz typ

RL = 50

Ω; Test Circuit 6

Distortion

% typ

RL = 50

Ω

Charge Injection

pC typ

CL = 1 nF; Test Circuit 9

CS (OFF)

pF typ

f = 1 kHz

CD (OFF)

pF typ

f = 1 kHz

CD, CS (ON)

pF typ

f = 1 MHz

POWER REQUIREMENTS

VDD = 3.3 V

Digital Inputs = 0 V or VDD

IDD

µA max

0.001

µA typ

IIN

µA typ

VIN = 3 V

100

mA max

VS/VD = 0 V

NOTES

1Temperature ranges are as follows: B Version, –40

°C to +85°C.

2Guaranteed by design, not subject to production test.

Specifications subject to change without notice.

(VDD = 3 V

10%, GND = 0 V. All specifications TMIN to TMAX unless otherwise noted.)

SINGLE SUPPLY

Table I. Truth Table

Function

Hi-Z

DISABLE

S1A

S2A

S3A

S4A

IN = 0

S1B

S2B

S3B

S4B

IN = 1

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