AD9816

–15–

REV. A

AVDD

AVSS

CAPT

CAPT

CAPB

CAPB

VREF

CML

VINR

AVSS

VING

DRVSS

DB5

DB4

DB3

DB2

DB1

DB0 (LSB)

DVSS

SLOAD

SDATA

SCLK

AD9816

1

2

3

4

5

6

7

8

9

10

11

33

32

31

30

29

28

27

26

25

24

23

0.01 F

0.1 F

DB5

DB4

DB3

DB2

DB1

DB0 (LSB)

SLOAD

SDATA

SCLK

0.01 F

0.1 F

RED_IN

GREEN_IN

BLUE_IN

1.0 F

+

0.1 F

10 F

+

10 F

0.1 F

0.1 F

0.1 F

0.01 F

0.1 F

0.1 F

0.01 F

ADCCLK

CDSCLK2

CDSCLK1

0.1 F

1.0 F

R1

R2

OPTIONAL DC OFFSET

GROUND-REFERENCED SAMPLING

NC = NO CONNECT

Figure 21. Recommended Circuit for SHA Mode

SHA Mode Circuit

The circuit configuration for SHA mode is identical to CDS

mode except for two differences: the analog inputs should be

dc-coupled, and the OFFSET pin is tied to ground or a desired

dc voltage (see Circuit Descriptions). In CIS applications, the

reference black level of the CIS can be connected to the OFF-

SET pin, to remove the dc offset. Removing the coarse offset of

the CIS signal will allow the dynamic range of the AD9816 to

be maximized.