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AD9775EB датащи(PDF) 39 Page - Analog Devices |
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AD9775EB датащи(HTML) 39 Page - Analog Devices |
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39 / 48 page ![]() REV. 0 AD9775 –39– SIGNAL GENERATOR CLK+/CLK– DATACLK LECROY PULSE GENERATOR TRIG INP AWG2021 OR DG2020 INPUT CLOCK DAC1, DB11–DB0 AD9775 DAC2, DB11–DB0 40-PIN RIBBON CABLE JUMPER CONFIGURATION FOR TWO PORT MODE PLL ON SOLDERED/IN UNSOLDERED/OUT JP1 – JP2 – JP3 – JP5 – JP6 – JP12 – JP24 – JP25 – JP26 – JP27 – JP31 – JP32 – JP33 – Figure 55. Test Configuration for AD9775 in Two Port Mode with PLL Enabled, Signal Generator Frequency = Input Data Rate, DAC Output Data Rate = Signal Generator Frequency Interpolation Rate SIGNAL GENERATOR CLK+/CLK– ONEPORTCLK LECROY PULSE GENERATOR TRIG INP AWG2021 OR DG2020 INPUT CLOCK DAC1, DB11–DB0 AD9775 DAC2, DB11–DB0 JUMPER CONFIGURATION FOR TWO PORT MODE PLL ON SOLDERED/IN UNSOLDERED/OUT JP1 – JP2 – JP3 – JP5 – JP6 – JP12 – JP24 – JP25 – JP26 – JP27 – JP31 – JP32 – JP33 – Figure 56. Test Configuration for AD9775 in One Port Mode with PLL Enabled, Signal Generator Frequency = One-Half Interleaved Input Data Rate, ONEPORTCLK = Interleaved Input Data Rate, DAC Output Data Rate = Signal Generator Frequency Interpolation Rate |
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